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Wed, 9 May 2018 23:57:46 +0800 From: "Zhang, Tianfei" To: "Richardson, Bruce" CC: Thomas Monjalon , "Xu, Rosen" , "dev@dpdk.org" , "Zhang, Roy Fan" , "Doherty, Declan" , "shreyansh.jain@nxp.com" , "Yigit, Ferruh" , "Ananyev, Konstantin" , "Liu, Song" , "Wu, Hao" , "gaetan.rivet@6wind.com" , "Wu, Yanglong" Thread-Topic: [dpdk-dev] [PATCH v10 3/3] iFPGA: Add Intel FPGA BUS Rawdev Driver Thread-Index: AQHT52lEdncoERH5GkiZeAMr76RBfqQm9EqAgACSl9D//3tiAIAAiItA Date: Wed, 9 May 2018 15:57:46 +0000 Message-ID: References: <1521553556-62982-1-git-send-email-rosen.xu@intel.com> <1525851801-16101-1-git-send-email-rosen.xu@intel.com> <1525851801-16101-4-git-send-email-rosen.xu@intel.com> <2225742.ccNGmmKHOr@xps> <20180509153712.GA19692@bricha3-MOBL.ger.corp.intel.com> In-Reply-To: <20180509153712.GA19692@bricha3-MOBL.ger.corp.intel.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiNTFlMzQyMmQtNGI0My00NTkzLWI1MTAtMTI5YzhlYmM0NjQyIiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX05UIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE3LjIuNS4xOCIsIlRydXN0ZWRMYWJlbEhhc2giOiJRSnpEa21TVXlscUdPSE00cm1cL2g5MEdwdUpKMkxUNW5xMVk1TExndmtjMklvVFdSU0Y0ejJWM3NaZkdIc09FRCJ9 x-ctpclassification: CTP_NT x-originating-ip: [172.17.6.105] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-dev] [PATCH v10 3/3] iFPGA: Add Intel FPGA BUS Rawdev Driver X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 09 May 2018 15:57:52 -0000 > -----Original Message----- > From: Richardson, Bruce > Sent: Wednesday, May 9, 2018 11:37 PM > To: Zhang, Tianfei > Cc: Thomas Monjalon ; Xu, Rosen > ; dev@dpdk.org; Zhang, Roy Fan > ; Doherty, Declan ; > shreyansh.jain@nxp.com; Yigit, Ferruh ; Ananyev, > Konstantin ; Liu, Song > ; Wu, Hao ; > gaetan.rivet@6wind.com; Wu, Yanglong > Subject: Re: [dpdk-dev] [PATCH v10 3/3] iFPGA: Add Intel FPGA BUS Rawdev > Driver >=20 > On Wed, May 09, 2018 at 04:33:45PM +0100, Zhang, Tianfei wrote: > > > > > > > -----Original Message----- > > > From: Thomas Monjalon [mailto:thomas@monjalon.net] > > > Sent: Wednesday, May 9, 2018 10:47 PM > > > To: Xu, Rosen > > > Cc: dev@dpdk.org; Zhang, Roy Fan ; Doherty, > > > Declan ; Richardson, Bruce > > > ; shreyansh.jain@nxp.com; Yigit, Ferruh > > > ; Ananyev, Konstantin > > > ; Zhang, Tianfei > > > ; Liu, Song ; Wu, Hao > > > ; gaetan.rivet@6wind.com; Wu, Yanglong > > > > > > Subject: Re: [dpdk-dev] [PATCH v10 3/3] iFPGA: Add Intel FPGA BUS > > > Rawdev Driver > > > > > > 09/05/2018 09:43, Xu, Rosen: > > > > From: Rosen Xu > > > > > > > > Add Intel FPGA BUS Rawdev Driver which is based on librte_rawdev > > > > library. > > > > > > > > Signed-off-by: Rosen Xu > > > > Signed-off-by: Yanglong Wu > > > > Signed-off-by: Tianfei Zhang > > > > Acked-by: Shreyansh Jain > > > > > > I have a compilation error: > > > drivers/raw/ifpga_rawdev/base/ifpga_fme_pr.c:10:15: error: > > > instruction requires: AVX-512 ISA > > > > > > because of vmovdqu64: > > > > > > #if defined(RTE_ARCH_X86_64) > > > static inline void copy512(const void *src, void *dst) { > > > asm volatile("vmovdqu64 (%0), %%zmm0;" > > > "vmovntdq %%zmm0, (%1);" > > > : > > > : "r"(src), "r"(dst)); > > > } > > > #else > > > static inline void copy512(const void *src, void *dst) { > > > UNUSED(src); > > > UNUSED(dst); > > > WARN_ON(1); > > > } > > > #endif > > > > > > I suggest to fix it quickly without waiting a v11 with this: > > > > > > static inline void copy512(const void *src, void *dst) { #ifdef > > > CC_SUPPORT_AVX512F > > > asm volatile("vmovdqu64 (%0), %%zmm0;" > > > "vmovntdq %%zmm0, (%1);" > > > : > > > : "r"(src), "r"(dst)); > > > #else > > > UNUSED(src); > > > UNUSED(dst); > > > WARN_ON(1); > > > #endif > > > } > > > > > > It does not make any runtime detection, but it's better than previous= ly. > > > > > > > Which linux distribution are you use? We can compile it on Ubuntu 16.04 > and RHEL 7.4. > > We will fix it on V11. > > >=20 > This shows up with meson builds for non-avx-512 architectures using clang= . > The makefile has the following snippet that doesn't have an equivalent in= the > meson.build file. >=20 > 26 ifeq ($(CONFIG_RTE_TOOLCHAIN_CLANG),y)$ > 27 >-------CFLAGS_ifpga_fme_pr.o +=3D -march=3Dknl$ > 28 endif$ >=20 > However, it does also bring up the questions as to the unconditional use = of > AVX-512 code? What happens if this code is run on a system without > AVX-512 support? This function is for SKY MCP platform (Xeon + FPGA integrated chip) which c= an accelerate the PR (partial reconfiguration ) function on FPGA. So the SKY support the AVX-512 instruction set.