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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: BL1PR11MB5477.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: febfe140-8de9-434f-75df-08da4aa7d04b X-MS-Exchange-CrossTenant-originalarrivaltime: 10 Jun 2022 06:09:44.0321 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: nCeCWWm69amsPY0cy+reOj5Zz9uScLOLdZ+enO/TzkMSk6Dn1ZGZ39Uf2GAbo7s6zQg6DL5xAOACmYI50Ecrrw== X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN0PR11MB5963 X-OriginatorOrg: intel.com X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org > -----Original Message----- > From: Huang, Wei > Sent: Thursday, June 9, 2022 3:37 PM > To: dev@dpdk.org; thomas@monjalon.net; nipun.gupta@nxp.com; > hemant.agrawal@nxp.com > Cc: stable@dpdk.org; Xu, Rosen ; Zhang, Tianfei > ; Zhang, Qi Z ; Huang, Wei > > Subject: [PATCH v7 1/5] raw/ifpga: introduce AFU driver framework >=20 > AFU (Acceleration Function Unit) is part of FPGA and enumerated by ifpga = driver. > This driver implements common AFU device interfaces and exposes them to > application as standard raw device APIs. > Normally application can operate specified AFU as below, 1. call > rte_rawdev_pmd_get_named_dev() to find AFU device. > 2. call rte_rawdev_configure() to initialize AFU device. > 3. call rte_rawdev_selftest() to test AFU device. >=20 > Signed-off-by: Wei Huang > --- > v2: fix typo > --- > v3: fix build error in FreeBSD13-64, UB2004-32 and UB2204-32 > --- > v4: fix coding style issue and build error in FreeBSD13-64 > --- > v5: split patch into several patches > --- > v6: move source files to ifpga and rename, use spinlock > --- > drivers/raw/ifpga/afu_pmd_core.c | 453 > +++++++++++++++++++++++++++++++++++++++ > drivers/raw/ifpga/afu_pmd_core.h | 76 +++++++ > drivers/raw/ifpga/meson.build | 2 +- > 3 files changed, 530 insertions(+), 1 deletion(-) create mode 100644 > drivers/raw/ifpga/afu_pmd_core.c create mode 100644 > drivers/raw/ifpga/afu_pmd_core.h >=20 > diff --git a/drivers/raw/ifpga/afu_pmd_core.c > b/drivers/raw/ifpga/afu_pmd_core.c > new file mode 100644 > index 0000000..a24b517 > --- /dev/null > +++ b/drivers/raw/ifpga/afu_pmd_core.c > @@ -0,0 +1,453 @@ > +/* SPDX-License-Identifier: BSD-3-Clause > + * Copyright 2022 Intel Corporation > + * > + * AFU is Acceleration Function Unit in FPGA, it is enumerated by ifpga = pmd. > + * Suppose AFU is found in FPGA at PCI address 31:00.0, then you can > +create > + * and test a AFU device by following steps in application. > + * 1. rte_vdev_init("ifpga_rawdev_cfg0", "ifpga=3D31:00.0,port=3D0") > + * 2. rawdev =3D rte_rawdev_pmd_get_named_dev("afu_0|31:00.0") > + * 3. rte_rawdev_configure(rawdev->dev_id, &cfg, sizeof(cfg)) > + * 4. rte_rawdev_selftest(rawdev->dev_id) > + * 5. rte_vdev_uninit("ifpga_rawdev_cfg0") > + * > + * AFU device name format used in rte_rawdev_pmd_get_named_dev is > + * "afu_[port]|[BDF]". Please refer to OPAE documentation for the > +meaning of > + * port. Each AFU device has specific configuration data, they are > +defined > + * in rte_pmd_afu.h. > + * > + */ > + > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > + > +#include > +#include > +#include > +#include > + > +#include "afu_pmd_core.h" > + > +static struct rte_afu_uuid afu_pmd_uuid_map[AFU_RAWDEV_MAX_DRVS+1]; > +TAILQ_HEAD(afu_drv_list, afu_rawdev_drv); static struct afu_drv_list > +afu_pmd_list =3D TAILQ_HEAD_INITIALIZER(afu_pmd_list); > + > +static inline int afu_rawdev_trylock(struct afu_rawdev *dev) { > + if (!dev || !dev->sd) > + return 0; > + > + return rte_spinlock_trylock(&dev->sd->lock); > +} > + > +static inline void afu_rawdev_unlock(struct afu_rawdev *dev) { > + if (!dev || !dev->sd) > + return; > + > + rte_spinlock_unlock(&dev->sd->lock); > +} > + > +static int afu_rawdev_configure(const struct rte_rawdev *rawdev, > + rte_rawdev_obj_t config, size_t config_size) { > + struct afu_rawdev *dev =3D NULL; > + int ret =3D 0; > + > + IFPGA_RAWDEV_PMD_FUNC_TRACE(); > + > + dev =3D afu_rawdev_get_priv(rawdev); > + if (!dev) > + return -ENODEV; > + > + if (dev->ops && dev->ops->config) > + ret =3D (*dev->ops->config)(dev, config, config_size); > + > + return ret; > +} > + > +static int afu_rawdev_start(struct rte_rawdev *rawdev) { > + struct afu_rawdev *dev =3D NULL; > + int ret =3D 0; > + > + IFPGA_RAWDEV_PMD_FUNC_TRACE(); > + > + dev =3D afu_rawdev_get_priv(rawdev); > + if (!dev) > + return -ENODEV; > + > + ret =3D afu_rawdev_trylock(dev); > + if (!ret) { > + IFPGA_RAWDEV_PMD_WARN("AFU is busy, please start it > later"); > + return ret; > + } > + > + if (dev->ops && dev->ops->start) > + ret =3D (*dev->ops->start)(dev); > + > + afu_rawdev_unlock(dev); > + > + return ret; > +} > + > +static void afu_rawdev_stop(struct rte_rawdev *rawdev) { > + struct afu_rawdev *dev =3D NULL; > + int ret =3D 0; > + > + IFPGA_RAWDEV_PMD_FUNC_TRACE(); > + > + dev =3D afu_rawdev_get_priv(rawdev); > + if (!dev) > + return; > + > + ret =3D afu_rawdev_trylock(dev); > + if (!ret) { > + IFPGA_RAWDEV_PMD_WARN("AFU is busy, please stop it > later"); > + return; > + } > + > + if (dev->ops && dev->ops->stop) > + ret =3D (*dev->ops->stop)(dev); > + > + afu_rawdev_unlock(dev); > +} > + > +static int afu_rawdev_close(struct rte_rawdev *rawdev) { > + struct afu_rawdev *dev =3D NULL; > + int ret =3D 0; > + > + IFPGA_RAWDEV_PMD_FUNC_TRACE(); > + > + dev =3D afu_rawdev_get_priv(rawdev); > + if (!dev) > + return -ENODEV; > + > + if (dev->ops && dev->ops->close) > + ret =3D (*dev->ops->close)(dev); > + > + return ret; > +} > + > +static int afu_rawdev_reset(struct rte_rawdev *rawdev) { > + struct afu_rawdev *dev =3D NULL; > + int ret =3D 0; > + > + IFPGA_RAWDEV_PMD_FUNC_TRACE(); > + > + dev =3D afu_rawdev_get_priv(rawdev); > + if (!dev) > + return -ENODEV; > + > + ret =3D afu_rawdev_trylock(dev); > + if (!ret) { > + IFPGA_RAWDEV_PMD_WARN("AFU is busy, please reset it > later"); > + return ret; > + } > + > + if (dev->ops && dev->ops->reset) > + ret =3D (*dev->ops->reset)(dev); > + > + afu_rawdev_unlock(dev); > + > + return ret; > +} > + > +static int afu_rawdev_selftest(uint16_t dev_id) { > + struct afu_rawdev *dev =3D NULL; > + int ret =3D 0; > + > + IFPGA_RAWDEV_PMD_FUNC_TRACE(); > + > + if (!rte_rawdev_pmd_is_valid_dev(dev_id)) > + return -ENODEV; > + > + dev =3D afu_rawdev_get_priv(&rte_rawdevs[dev_id]); > + if (!dev) > + return -ENOENT; > + > + ret =3D afu_rawdev_trylock(dev); > + if (!ret) { > + IFPGA_RAWDEV_PMD_WARN("AFU is busy, please test it > later"); > + return ret; > + } > + > + if (dev->ops && dev->ops->test) > + ret =3D (*dev->ops->test)(dev); > + > + afu_rawdev_unlock(dev); > + > + return ret; > +} > + > +static int afu_rawdev_dump(struct rte_rawdev *rawdev, FILE *f) { > + struct afu_rawdev *dev =3D NULL; > + int ret =3D 0; > + > + IFPGA_RAWDEV_PMD_FUNC_TRACE(); > + > + dev =3D afu_rawdev_get_priv(rawdev); > + if (!dev) > + return -ENODEV; > + > + if (dev->ops && dev->ops->dump) > + ret =3D (*dev->ops->dump)(dev, f); > + > + return ret; > +} > + > +static const struct rte_rawdev_ops afu_rawdev_ops =3D { > + .dev_info_get =3D NULL, > + .dev_configure =3D afu_rawdev_configure, > + .dev_start =3D afu_rawdev_start, > + .dev_stop =3D afu_rawdev_stop, > + .dev_close =3D afu_rawdev_close, > + .dev_reset =3D afu_rawdev_reset, > + > + .queue_def_conf =3D NULL, > + .queue_setup =3D NULL, > + .queue_release =3D NULL, > + .queue_count =3D NULL, > + > + .attr_get =3D NULL, > + .attr_set =3D NULL, > + > + .enqueue_bufs =3D NULL, > + .dequeue_bufs =3D NULL, > + > + .dump =3D afu_rawdev_dump, > + > + .xstats_get =3D NULL, > + .xstats_get_names =3D NULL, > + .xstats_get_by_name =3D NULL, > + .xstats_reset =3D NULL, > + > + .firmware_status_get =3D NULL, > + .firmware_version_get =3D NULL, > + .firmware_load =3D NULL, > + .firmware_unload =3D NULL, > + > + .dev_selftest =3D afu_rawdev_selftest, > +}; > + > +static int afu_shared_data_alloc(const char *name, > + struct afu_shared_data **data, int socket_id) { > + const struct rte_memzone *mz; > + char mz_name[RTE_MEMZONE_NAMESIZE]; > + struct afu_shared_data *sd =3D NULL; > + int init_mz =3D 0; > + > + if (!name || !data) > + return -EINVAL; > + > + /* name format is afu_?|??:??.? which is unique */ > + snprintf(mz_name, sizeof(mz_name), "%s", name); > + > + mz =3D rte_memzone_lookup(mz_name); > + if (!mz) { > + mz =3D rte_memzone_reserve(mz_name, sizeof(struct > afu_shared_data), > + socket_id, 0); > + init_mz =3D 1; > + } > + > + if (!mz) { > + IFPGA_RAWDEV_PMD_ERR("Allocate memory zone %s failed!", > + mz_name); > + return -ENOMEM; > + } > + > + sd =3D (struct afu_shared_data *)mz->addr; > + > + if (init_mz) /* initialize memory zone on the first time */ > + rte_spinlock_init(&sd->lock); > + > + *data =3D sd; > + > + return 0; > +} > + > +static int afu_rawdev_name_get(struct rte_afu_device *afu_dev, char *nam= e, > + size_t size) > +{ > + int n =3D 0; > + > + if (!afu_dev || !name || !size) > + return -EINVAL; > + > + n =3D snprintf(name, size, "afu_%s", afu_dev->device.name); > + if (n >=3D (int)size) { > + IFPGA_RAWDEV_PMD_ERR("Name of AFU device is too long!"); > + return -ENAMETOOLONG; > + } > + > + return 0; > +} > + > +static struct afu_ops *afu_ops_get(struct rte_afu_uuid *afu_id) { > + struct afu_rawdev_drv *drv =3D NULL; > + > + if (!afu_id) > + return NULL; > + > + TAILQ_FOREACH(drv, &afu_pmd_list, next) { > + if ((drv->uuid.uuid_low =3D=3D afu_id->uuid_low) && > + (drv->uuid.uuid_high =3D=3D afu_id->uuid_high)) > + break; > + } > + > + return drv ? drv->ops : NULL; > +} > + > +static int afu_rawdev_create(struct rte_afu_device *afu_dev, int > +socket_id) { > + struct rte_rawdev *rawdev =3D NULL; > + struct afu_rawdev *dev =3D NULL; > + char name[RTE_RAWDEV_NAME_MAX_LEN] =3D {0}; > + int ret =3D 0; > + > + if (!afu_dev) > + return -EINVAL; > + > + ret =3D afu_rawdev_name_get(afu_dev, name, sizeof(name)); > + if (ret) > + return ret; > + > + IFPGA_RAWDEV_PMD_INFO("Create raw device %s on NUMA node > %d", > + name, socket_id); > + > + /* Allocate device structure */ > + rawdev =3D rte_rawdev_pmd_allocate(name, sizeof(struct afu_rawdev), > + socket_id); > + if (!rawdev) { > + IFPGA_RAWDEV_PMD_ERR("Unable to allocate raw device"); > + return -ENOMEM; > + } > + > + rawdev->dev_ops =3D &afu_rawdev_ops; > + rawdev->device =3D &afu_dev->device; > + rawdev->driver_name =3D afu_dev->driver->driver.name; > + > + dev =3D afu_rawdev_get_priv(rawdev); > + if (!dev) > + goto cleanup; > + > + dev->rawdev =3D rawdev; > + dev->port =3D afu_dev->id.port; > + dev->addr =3D afu_dev->mem_resource[0].addr; > + dev->ops =3D afu_ops_get(&afu_dev->id.uuid); > + if (dev->ops =3D=3D NULL) { > + IFPGA_RAWDEV_PMD_ERR("Unsupported AFU device"); > + goto cleanup; > + } > + > + if (dev->ops->init) { > + ret =3D (*dev->ops->init)(dev); > + if (ret) { > + IFPGA_RAWDEV_PMD_ERR("Failed to init %s", name); > + goto cleanup; > + } > + } > + > + ret =3D afu_shared_data_alloc(name, &dev->sd, socket_id); > + if (ret) > + goto cleanup; > + > + return ret; > + > +cleanup: > + rte_rawdev_pmd_release(rawdev); > + return ret; > +} > + > +static int afu_rawdev_destroy(struct rte_afu_device *afu_dev) { > + struct rte_rawdev *rawdev =3D NULL; > + char name[RTE_RAWDEV_NAME_MAX_LEN] =3D {0}; > + int ret =3D 0; > + > + if (!afu_dev) > + return -EINVAL; > + > + ret =3D afu_rawdev_name_get(afu_dev, name, sizeof(name)); > + if (ret) > + return ret; > + > + IFPGA_RAWDEV_PMD_INFO("Destroy raw device %s", name); > + > + rawdev =3D rte_rawdev_pmd_get_named_dev(name); > + if (!rawdev) { > + IFPGA_RAWDEV_PMD_ERR("Raw device %s not found", name); > + return -EINVAL; > + } > + > + /* rte_rawdev_close is called by pmd_release */ > + ret =3D rte_rawdev_pmd_release(rawdev); > + if (ret) > + IFPGA_RAWDEV_PMD_DEBUG("Device cleanup failed"); > + > + return 0; > +} > + > +static int afu_rawdev_probe(struct rte_afu_device *afu_dev) { > + IFPGA_RAWDEV_PMD_FUNC_TRACE(); > + return afu_rawdev_create(afu_dev, rte_socket_id()); } > + > +static int afu_rawdev_remove(struct rte_afu_device *afu_dev) { > + IFPGA_RAWDEV_PMD_FUNC_TRACE(); > + return afu_rawdev_destroy(afu_dev); > +} > + > +static struct rte_afu_driver afu_pmd =3D { > + .id_table =3D afu_pmd_uuid_map, > + .probe =3D afu_rawdev_probe, > + .remove =3D afu_rawdev_remove > +}; > + > +RTE_PMD_REGISTER_AFU(afu_rawdev_driver, afu_pmd); > + > +static void update_uuid_map(void) > +{ > + int i =3D 0; > + struct rte_afu_uuid *afu_id =3D afu_pmd_uuid_map; > + struct afu_rawdev_drv *drv; > + > + TAILQ_FOREACH(drv, &afu_pmd_list, next) { > + if (i++ < AFU_RAWDEV_MAX_DRVS) { > + afu_id->uuid_low =3D drv->uuid.uuid_low; > + afu_id->uuid_high =3D drv->uuid.uuid_high; > + afu_id++; > + } > + } > + if (i <=3D AFU_RAWDEV_MAX_DRVS) { > + afu_id->uuid_low =3D 0; > + afu_id->uuid_high =3D 0; > + } > +} > + > +void afu_pmd_register(struct afu_rawdev_drv *driver) { > + TAILQ_INSERT_TAIL(&afu_pmd_list, driver, next); > + update_uuid_map(); > +} > + > +void afu_pmd_unregister(struct afu_rawdev_drv *driver) { > + TAILQ_REMOVE(&afu_pmd_list, driver, next); > + update_uuid_map(); > +} > diff --git a/drivers/raw/ifpga/afu_pmd_core.h > b/drivers/raw/ifpga/afu_pmd_core.h > new file mode 100644 > index 0000000..4fad2c7 > --- /dev/null > +++ b/drivers/raw/ifpga/afu_pmd_core.h > @@ -0,0 +1,76 @@ > +/* SPDX-License-Identifier: BSD-3-Clause > + * Copyright 2022 Intel Corporation > + */ > + > +#ifndef __AFU_PMD_CORE_H__ > +#define __AFU_PMD_CORE_H__ > + > +#ifdef __cplusplus > +extern "C" { > +#endif > + > +#include > +#include > +#include > + > +#include > +#include > +#include > + > +#include "ifpga_rawdev.h" > + > +#define AFU_RAWDEV_MAX_DRVS 32 > + > +struct afu_rawdev; > + > +struct afu_ops { > + int (*init)(struct afu_rawdev *dev); > + int (*config)(struct afu_rawdev *dev, void *config, > + size_t config_size); > + int (*start)(struct afu_rawdev *dev); > + int (*stop)(struct afu_rawdev *dev); > + int (*test)(struct afu_rawdev *dev); > + int (*close)(struct afu_rawdev *dev); > + int (*reset)(struct afu_rawdev *dev); > + int (*dump)(struct afu_rawdev *dev, FILE *f); }; > + > +struct afu_shared_data { > + rte_spinlock_t lock; /* lock for multi-process access */ }; > + > +struct afu_rawdev_drv { > + TAILQ_ENTRY(afu_rawdev_drv) next; > + struct rte_afu_uuid uuid; > + struct afu_ops *ops; > +}; > + > +struct afu_rawdev { > + struct rte_rawdev *rawdev; /* point to parent raw device */ > + struct afu_shared_data *sd; /* shared data for multi-process */ > + struct afu_ops *ops; /* device operation functions */ > + int port; /* index of port the AFU attached */ > + void *addr; /* base address of AFU registers */ > + void *priv; /* private driver data */ }; > + > +static inline struct afu_rawdev * > +afu_rawdev_get_priv(const struct rte_rawdev *rawdev) { > + return rawdev ? (struct afu_rawdev *)rawdev->dev_private : NULL; } > + > +void afu_pmd_register(struct afu_rawdev_drv *driver); void > +afu_pmd_unregister(struct afu_rawdev_drv *driver); > + > +#define AFU_PMD_REGISTER(drv)\ > +RTE_INIT(afupmdinitfunc_ ##drv)\ > +{\ > + afu_pmd_register(&drv);\ > +} > + > +#ifdef __cplusplus > +} > +#endif > + > +#endif /* __AFU_PMD_CORE_H__ */ > diff --git a/drivers/raw/ifpga/meson.build b/drivers/raw/ifpga/meson.buil= d > index aeccc17..d9a6f29 100644 > --- a/drivers/raw/ifpga/meson.build > +++ b/drivers/raw/ifpga/meson.build > @@ -13,7 +13,7 @@ objs =3D [base_objs] > deps +=3D ['ethdev', 'rawdev', 'pci', 'bus_pci', 'kvargs', > 'bus_vdev', 'bus_ifpga', 'net', 'net_i40e', 'net_ipn3ke'] >=20 > -sources =3D files('ifpga_rawdev.c', 'rte_pmd_ifpga.c') > +sources =3D files('ifpga_rawdev.c', 'rte_pmd_ifpga.c', 'afu_pmd_core.c') >=20 > includes +=3D include_directories('base') includes +=3D > include_directories('../../net/ipn3ke') > -- > 1.8.3.1 It looks good for me, you can add: Acked-by: Tianfei Zhang