[PATCH v1] power: support amd-pstate cpufreq driver

[PATCH v1] power: support amd-pstate cpufreq driver

[Sivaprasad Tummala]

amd-pstate introduces a new CPU frequency control mechanism for AMD
processors using the ACPI Collaborative Performance Power Control
feature for a finer grained frequency management.

Patch to add support for amd-pstate driver.

Signed-off-by: Sivaprasad Tummala <Sivaprasad.Tummala@amd.com>
---
 app/test/test_power.c                  |   1 +
 app/test/test_power_cpufreq.c          |   5 +-
 doc/guides/rel_notes/release_23_07.rst |   3 +
 examples/l3fwd-power/main.c            |   1 +
 lib/power/meson.build                  |   1 +
 lib/power/power_amd_pstate_cpufreq.c   | 698 +++++++++++++++++++++++++
 lib/power/power_amd_pstate_cpufreq.h   | 219 ++++++++
 lib/power/rte_power.c                  |  26 +
 lib/power/rte_power.h                  |   3 +-
 lib/power/rte_power_pmd_mgmt.c         |   6 +-
 10 files changed, 958 insertions(+), 5 deletions(-)
 create mode 100644 lib/power/power_amd_pstate_cpufreq.c
 create mode 100644 lib/power/power_amd_pstate_cpufreq.h

diff --git a/app/test/test_power.c b/app/test/test_power.c
index b7b5561348..11781a5866 100644
--- a/app/test/test_power.c
+++ b/app/test/test_power.c
@@ -134,6 +134,7 @@ test_power(void)
 	const enum power_management_env envs[] = {PM_ENV_ACPI_CPUFREQ,
 			PM_ENV_KVM_VM,
 			PM_ENV_PSTATE_CPUFREQ,
+			PM_ENV_AMD_PSTATE_CPUFREQ,
 			PM_ENV_CPPC_CPUFREQ};
 
 	unsigned int i;
diff --git a/app/test/test_power_cpufreq.c b/app/test/test_power_cpufreq.c
index 4d013cd7bb..9a14e6ad6a 100644
--- a/app/test/test_power_cpufreq.c
+++ b/app/test/test_power_cpufreq.c
@@ -85,7 +85,8 @@ check_cur_freq(unsigned int lcore_id, uint32_t idx, bool turbo)
 		freq_conv = cur_freq;
 
 		env = rte_power_get_env();
-		if (env == PM_ENV_CPPC_CPUFREQ || env == PM_ENV_PSTATE_CPUFREQ) {
+		if (env == PM_ENV_CPPC_CPUFREQ || env == PM_ENV_PSTATE_CPUFREQ ||
+			env == PM_ENV_AMD_PSTATE_CPUFREQ) {
 			/* convert the frequency to nearest 100000 value
 			 * Ex: if cur_freq=1396789 then freq_conv=1400000
 			 * Ex: if cur_freq=800030 then freq_conv=800000
@@ -502,7 +503,7 @@ test_power_cpufreq(void)
 	/* Test environment configuration */
 	env = rte_power_get_env();
 	if ((env != PM_ENV_ACPI_CPUFREQ) && (env != PM_ENV_PSTATE_CPUFREQ) &&
-			(env != PM_ENV_CPPC_CPUFREQ)) {
+		(env != PM_ENV_CPPC_CPUFREQ) && (env != PM_ENV_AMD_PSTATE_CPUFREQ)) {
 		printf("Unexpectedly got an environment other than ACPI/PSTATE\n");
 		goto fail_all;
 	}
diff --git a/doc/guides/rel_notes/release_23_07.rst b/doc/guides/rel_notes/release_23_07.rst
index a9b1293689..9e714cacae 100644
--- a/doc/guides/rel_notes/release_23_07.rst
+++ b/doc/guides/rel_notes/release_23_07.rst
@@ -55,6 +55,9 @@ New Features
      Also, make sure to start the actual text at the margin.
      =======================================================
 
+   * **Added amd-pstate driver support to power management library.**
+
+        Added support for amd-pstate driver which works on AMD Zen processors.
 
 Removed Items
 -------------
diff --git a/examples/l3fwd-power/main.c b/examples/l3fwd-power/main.c
index 3f01cbd9e2..16495824e3 100644
--- a/examples/l3fwd-power/main.c
+++ b/examples/l3fwd-power/main.c
@@ -2245,6 +2245,7 @@ init_power_library(void)
 		env = rte_power_get_env();
 		if (env != PM_ENV_ACPI_CPUFREQ &&
 				env != PM_ENV_PSTATE_CPUFREQ &&
+				env != PM_ENV_AMD_PSTATE_CPUFREQ &&
 				env != PM_ENV_CPPC_CPUFREQ) {
 			RTE_LOG(ERR, POWER,
 				"Only ACPI, PSTATE and CPPC mode are supported\n");
diff --git a/lib/power/meson.build b/lib/power/meson.build
index 1ce8b7c07d..532aa4fbd6 100644
--- a/lib/power/meson.build
+++ b/lib/power/meson.build
@@ -18,6 +18,7 @@ sources = files(
         'power_cppc_cpufreq.c',
         'power_kvm_vm.c',
         'power_pstate_cpufreq.c',
+        'power_amd_pstate_cpufreq.c',
         'rte_power.c',
         'rte_power_intel_uncore.c',
         'rte_power_pmd_mgmt.c',
diff --git a/lib/power/power_amd_pstate_cpufreq.c b/lib/power/power_amd_pstate_cpufreq.c
new file mode 100644
index 0000000000..aa6868aaa2
--- /dev/null
+++ b/lib/power/power_amd_pstate_cpufreq.c
@@ -0,0 +1,698 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2010-2021 Intel Corporation
+ * Copyright(c) 2021 Arm Limited
+ * Copyright(c) 2023 Amd Limited
+ */
+
+#include <stdlib.h>
+
+#include <rte_memcpy.h>
+
+#include "power_amd_pstate_cpufreq.h"
+#include "power_common.h"
+
+/* macros used for rounding frequency to nearest 1000 */
+#define FREQ_ROUNDING_DELTA 500
+#define ROUND_FREQ_TO_N_1000 1000
+
+#define POWER_CONVERT_TO_DECIMAL 10
+
+#define POWER_GOVERNOR_USERSPACE "userspace"
+#define POWER_SYSFILE_SETSPEED   \
+		"/sys/devices/system/cpu/cpu%u/cpufreq/scaling_setspeed"
+#define POWER_SYSFILE_SCALING_MAX_FREQ \
+		"/sys/devices/system/cpu/cpu%u/cpufreq/scaling_max_freq"
+#define POWER_SYSFILE_SCALING_MIN_FREQ  \
+		"/sys/devices/system/cpu/cpu%u/cpufreq/scaling_min_freq"
+#define POWER_SYSFILE_HIGHEST_PERF \
+		"/sys/devices/system/cpu/cpu%u/acpi_cppc/highest_perf"
+#define POWER_SYSFILE_NOMINAL_PERF \
+		"/sys/devices/system/cpu/cpu%u/acpi_cppc/nominal_perf"
+#define POWER_SYSFILE_NOMINAL_FREQ \
+		"/sys/devices/system/cpu/cpu%u/acpi_cppc/nominal_freq"
+
+#define POWER_AMD_PSTATE_DRIVER "amd-pstate"
+#define BUS_FREQ     1000	/* khz */
+
+enum power_state {
+	POWER_IDLE = 0,
+	POWER_ONGOING,
+	POWER_USED,
+	POWER_UNKNOWN
+};
+
+/**
+ * Power info per lcore.
+ */
+struct amd_pstate_power_info {
+	uint32_t lcore_id;                   /**< Logical core id */
+	uint32_t state;                      /**< Power in use state */
+	FILE *f;                             /**< FD of scaling_setspeed */
+	char governor_ori[28];               /**< Original governor name */
+	uint32_t curr_idx;                   /**< Freq index in freqs array */
+	uint32_t nom_idx;                    /**< Nominal index in freqs array */
+	uint32_t highest_perf;		     /**< system wide max freq */
+	uint32_t nominal_perf;		     /**< system wide nominal freq */
+	uint16_t turbo_available;            /**< Turbo Boost available */
+	uint16_t turbo_enable;               /**< Turbo Boost enable/disable */
+	uint32_t nb_freqs;                   /**< number of available freqs */
+	uint32_t freqs[RTE_MAX_LCORE_FREQS]; /**< Frequency array */
+} __rte_cache_aligned;
+
+static struct amd_pstate_power_info lcore_power_info[RTE_MAX_LCORE];
+
+/**
+ * It is to set specific freq for specific logical core, according to the index
+ * of supported frequencies.
+ */
+static int
+set_freq_internal(struct amd_pstate_power_info *pi, uint32_t idx)
+{
+	if (idx >= RTE_MAX_LCORE_FREQS || idx >= pi->nb_freqs) {
+		RTE_LOG(ERR, POWER, "Invalid frequency index %u, which "
+				"should be less than %u\n", idx, pi->nb_freqs);
+		return -1;
+	}
+
+	/* Check if it is the same as current */
+	if (idx == pi->curr_idx)
+		return 0;
+
+	POWER_DEBUG_TRACE("Frequency[%u] %u to be set for lcore %u\n",
+			idx, pi->freqs[idx], pi->lcore_id);
+	if (fseek(pi->f, 0, SEEK_SET) < 0) {
+		RTE_LOG(ERR, POWER, "Fail to set file position indicator to 0 "
+			"for setting frequency for lcore %u\n", pi->lcore_id);
+		return -1;
+	}
+	if (fprintf(pi->f, "%u", pi->freqs[idx]) < 0) {
+		RTE_LOG(ERR, POWER, "Fail to write new frequency for "
+				"lcore %u\n", pi->lcore_id);
+		return -1;
+	}
+	fflush(pi->f);
+	pi->curr_idx = idx;
+
+	return 1;
+}
+
+/**
+ * It is to check the current scaling governor by reading sys file, and then
+ * set it into 'userspace' if it is not by writing the sys file. The original
+ * governor will be saved for rolling back.
+ */
+static int
+power_set_governor_userspace(struct amd_pstate_power_info *pi)
+{
+	return power_set_governor(pi->lcore_id, POWER_GOVERNOR_USERSPACE,
+			pi->governor_ori, sizeof(pi->governor_ori));
+}
+
+static int
+power_check_turbo(struct amd_pstate_power_info *pi)
+{
+	FILE *f_nom = NULL, *f_max = NULL;
+	int ret = -1;
+	uint32_t nominal_perf = 0, highest_perf = 0;
+
+	open_core_sysfs_file(&f_max, "r", POWER_SYSFILE_HIGHEST_PERF,
+			pi->lcore_id);
+	if (f_max == NULL) {
+		RTE_LOG(ERR, POWER, "failed to open %s\n",
+				POWER_SYSFILE_HIGHEST_PERF);
+		goto err;
+	}
+
+	open_core_sysfs_file(&f_nom, "r", POWER_SYSFILE_NOMINAL_PERF,
+			pi->lcore_id);
+	if (f_nom == NULL) {
+		RTE_LOG(ERR, POWER, "failed to open %s\n",
+				POWER_SYSFILE_NOMINAL_PERF);
+		goto err;
+	}
+
+	ret = read_core_sysfs_u32(f_max, &highest_perf);
+	if (ret < 0) {
+		RTE_LOG(ERR, POWER, "Failed to read %s\n",
+				POWER_SYSFILE_HIGHEST_PERF);
+		goto err;
+	}
+
+	ret = read_core_sysfs_u32(f_nom, &nominal_perf);
+	if (ret < 0) {
+		RTE_LOG(ERR, POWER, "Failed to read %s\n",
+				POWER_SYSFILE_NOMINAL_PERF);
+		goto err;
+	}
+
+	pi->highest_perf = highest_perf;
+	pi->nominal_perf = nominal_perf;
+
+	if (highest_perf > nominal_perf) {
+		pi->turbo_available = 1;
+		pi->turbo_enable = 1;
+		ret = 0;
+		POWER_DEBUG_TRACE("Lcore %u can do Turbo Boost! highest perf %u, "
+				"nominal perf %u\n",
+				pi->lcore_id, highest_perf, nominal_perf);
+	} else {
+		pi->turbo_available = 0;
+		pi->turbo_enable = 0;
+		POWER_DEBUG_TRACE("Lcore %u Turbo not available! highest perf %u, "
+				"nominal perf %u\n",
+				pi->lcore_id, highest_perf, nominal_perf);
+	}
+
+err:
+	if (f_max != NULL)
+		fclose(f_max);
+	if (f_nom != NULL)
+		fclose(f_nom);
+
+	return ret;
+}
+
+/**
+ * It is to get the available frequencies of the specific lcore by reading the
+ * sys file.
+ */
+static int
+power_get_available_freqs(struct amd_pstate_power_info *pi)
+{
+	FILE *f_min = NULL, *f_max = NULL, *f_nom = NULL;
+	int ret = -1, nominal_idx = -1;
+	uint32_t scaling_min_freq = 0, scaling_max_freq = 0;
+	uint32_t i, num_freqs = RTE_MAX_LCORE_FREQS;
+	uint32_t nominal_freq = 0, scaling_freq = 0;
+	uint32_t freq_calc = 0;
+
+	open_core_sysfs_file(&f_max, "r", POWER_SYSFILE_SCALING_MAX_FREQ,
+			pi->lcore_id);
+	if (f_max == NULL) {
+		RTE_LOG(ERR, POWER, "failed to open %s\n",
+				POWER_SYSFILE_SCALING_MAX_FREQ);
+		goto out;
+	}
+
+	open_core_sysfs_file(&f_min, "r", POWER_SYSFILE_SCALING_MIN_FREQ,
+			pi->lcore_id);
+	if (f_min == NULL) {
+		RTE_LOG(ERR, POWER, "failed to open %s\n",
+				POWER_SYSFILE_SCALING_MIN_FREQ);
+		goto out;
+	}
+
+	open_core_sysfs_file(&f_nom, "r", POWER_SYSFILE_NOMINAL_FREQ,
+			pi->lcore_id);
+	if (f_nom == NULL) {
+		RTE_LOG(ERR, POWER, "failed to open %s\n",
+				POWER_SYSFILE_NOMINAL_FREQ);
+		goto out;
+	}
+
+	ret = read_core_sysfs_u32(f_max, &scaling_max_freq);
+	if (ret < 0) {
+		RTE_LOG(ERR, POWER, "Failed to read %s\n",
+				POWER_SYSFILE_SCALING_MAX_FREQ);
+		goto out;
+	}
+
+	ret = read_core_sysfs_u32(f_min, &scaling_min_freq);
+	if (ret < 0) {
+		RTE_LOG(ERR, POWER, "Failed to read %s\n",
+				POWER_SYSFILE_SCALING_MIN_FREQ);
+		goto out;
+	}
+
+	ret = read_core_sysfs_u32(f_nom, &nominal_freq);
+	if (ret < 0) {
+		RTE_LOG(ERR, POWER, "Failed to read %s\n",
+				POWER_SYSFILE_NOMINAL_FREQ);
+		goto out;
+	}
+
+	power_check_turbo(pi);
+
+	if (scaling_max_freq < scaling_min_freq)
+		goto out;
+	else if (scaling_max_freq == scaling_min_freq)
+		num_freqs = 1;
+
+	if (num_freqs > 1) {
+		scaling_freq = (scaling_max_freq - scaling_min_freq);
+		scaling_freq <<= 10;
+		scaling_freq /= (num_freqs - 1);
+		scaling_freq >>= 10;
+	} else {
+		scaling_freq = 0;
+	}
+
+	/* Generate the freq bucket array. */
+	for (i = 0, pi->nb_freqs = 0; i < num_freqs; i++) {
+		freq_calc = scaling_max_freq - (i * scaling_freq);
+		/* convert the frequency to nearest 1000 value
+		 * Ex: if freq=1396789 then freq_conv=1397000
+		 * Ex: if freq=800030 then freq_conv=800000
+		 */
+		freq_calc = (freq_calc + FREQ_ROUNDING_DELTA)
+					/ ROUND_FREQ_TO_N_1000;
+		freq_calc = freq_calc * ROUND_FREQ_TO_N_1000;
+
+		/* update the frequency table only if required */
+		if ((pi->nb_freqs == 0) ||
+				pi->freqs[pi->nb_freqs-1] != freq_calc) {
+			pi->freqs[pi->nb_freqs++] = freq_calc;
+		}
+		if (nominal_idx == -1) {
+			if ((nominal_freq * BUS_FREQ) >= freq_calc) {
+				pi->nom_idx = pi->nb_freqs - 1;
+				nominal_idx = pi->nom_idx;
+			}
+		}
+	}
+
+	ret = 0;
+
+	POWER_DEBUG_TRACE("%d frequency(s) of lcore %u are available\n",
+			num_freqs, pi->lcore_id);
+
+out:
+	if (f_min != NULL)
+		fclose(f_min);
+	if (f_max != NULL)
+		fclose(f_max);
+	if (f_nom != NULL)
+		fclose(f_nom);
+
+	return ret;
+}
+
+/**
+ * It is to fopen the sys file for the future setting the lcore frequency.
+ */
+static int
+power_init_for_setting_freq(struct amd_pstate_power_info *pi)
+{
+	FILE *f = NULL;
+	char buf[BUFSIZ];
+	uint32_t i, freq;
+	int ret;
+
+	open_core_sysfs_file(&f, "rw+", POWER_SYSFILE_SETSPEED, pi->lcore_id);
+	if (f == NULL) {
+		RTE_LOG(ERR, POWER, "failed to open %s\n",
+				POWER_SYSFILE_SETSPEED);
+		goto err;
+	}
+
+	ret = read_core_sysfs_s(f, buf, sizeof(buf));
+	if (ret < 0) {
+		RTE_LOG(ERR, POWER, "Failed to read %s\n",
+				POWER_SYSFILE_SETSPEED);
+		goto err;
+	}
+
+	freq = strtoul(buf, NULL, POWER_CONVERT_TO_DECIMAL);
+
+	/* convert the frequency to nearest 1000 value
+	 * Ex: if freq=1396789 then freq_conv=1397000
+	 * Ex: if freq=800030 then freq_conv=800000
+	 */
+	unsigned int freq_conv = 0;
+	freq_conv = (freq + FREQ_ROUNDING_DELTA)
+				/ ROUND_FREQ_TO_N_1000;
+	freq_conv = freq_conv * ROUND_FREQ_TO_N_1000;
+
+	for (i = 0; i < pi->nb_freqs; i++) {
+		if (freq_conv == pi->freqs[i]) {
+			pi->curr_idx = i;
+			pi->f = f;
+			return 0;
+		}
+	}
+
+err:
+	if (f != NULL)
+		fclose(f);
+
+	return -1;
+}
+
+int
+power_amd_pstate_cpufreq_check_supported(void)
+{
+	return cpufreq_check_scaling_driver(POWER_AMD_PSTATE_DRIVER);
+}
+
+int
+power_amd_pstate_cpufreq_init(unsigned int lcore_id)
+{
+	struct amd_pstate_power_info *pi;
+	uint32_t exp_state;
+
+	if (lcore_id >= RTE_MAX_LCORE) {
+		RTE_LOG(ERR, POWER, "Lcore id %u can not exceeds %u\n",
+				lcore_id, RTE_MAX_LCORE - 1U);
+		return -1;
+	}
+
+	pi = &lcore_power_info[lcore_id];
+	exp_state = POWER_IDLE;
+	/* The power in use state works as a guard variable between
+	 * the CPU frequency control initialization and exit process.
+	 * The ACQUIRE memory ordering here pairs with the RELEASE
+	 * ordering below as lock to make sure the frequency operations
+	 * in the critical section are done under the correct state.
+	 */
+	if (!__atomic_compare_exchange_n(&(pi->state), &exp_state,
+					POWER_ONGOING, 0,
+					__ATOMIC_ACQUIRE, __ATOMIC_RELAXED)) {
+		RTE_LOG(INFO, POWER, "Power management of lcore %u is "
+				"in use\n", lcore_id);
+		return -1;
+	}
+
+	pi->lcore_id = lcore_id;
+	/* Check and set the governor */
+	if (power_set_governor_userspace(pi) < 0) {
+		RTE_LOG(ERR, POWER, "Cannot set governor of lcore %u to "
+				"userspace\n", lcore_id);
+		goto fail;
+	}
+
+	/* Get the available frequencies */
+	if (power_get_available_freqs(pi) < 0) {
+		RTE_LOG(ERR, POWER, "Cannot get available frequencies of "
+				"lcore %u\n", lcore_id);
+		goto fail;
+	}
+
+	/* Init for setting lcore frequency */
+	if (power_init_for_setting_freq(pi) < 0) {
+		RTE_LOG(ERR, POWER, "Cannot init for setting frequency for "
+				"lcore %u\n", lcore_id);
+		goto fail;
+	}
+
+	/* Set freq to max by default */
+	if (power_amd_pstate_cpufreq_freq_max(lcore_id) < 0) {
+		RTE_LOG(ERR, POWER, "Cannot set frequency of lcore %u "
+				"to max\n", lcore_id);
+		goto fail;
+	}
+
+	RTE_LOG(INFO, POWER, "Initialized successfully for lcore %u "
+			"power management\n", lcore_id);
+
+	__atomic_store_n(&(pi->state), POWER_USED, __ATOMIC_RELEASE);
+
+	return 0;
+
+fail:
+	__atomic_store_n(&(pi->state), POWER_UNKNOWN, __ATOMIC_RELEASE);
+	return -1;
+}
+
+/**
+ * It is to check the governor and then set the original governor back if
+ * needed by writing the sys file.
+ */
+static int
+power_set_governor_original(struct amd_pstate_power_info *pi)
+{
+	return power_set_governor(pi->lcore_id, pi->governor_ori, NULL, 0);
+}
+
+int
+power_amd_pstate_cpufreq_exit(unsigned int lcore_id)
+{
+	struct amd_pstate_power_info *pi;
+	uint32_t exp_state;
+
+	if (lcore_id >= RTE_MAX_LCORE) {
+		RTE_LOG(ERR, POWER, "Lcore id %u can not exceeds %u\n",
+				lcore_id, RTE_MAX_LCORE - 1U);
+		return -1;
+	}
+	pi = &lcore_power_info[lcore_id];
+	exp_state = POWER_USED;
+	/* The power in use state works as a guard variable between
+	 * the CPU frequency control initialization and exit process.
+	 * The ACQUIRE memory ordering here pairs with the RELEASE
+	 * ordering below as lock to make sure the frequency operations
+	 * in the critical section are done under the correct state.
+	 */
+	if (!__atomic_compare_exchange_n(&(pi->state), &exp_state,
+					POWER_ONGOING, 0,
+					__ATOMIC_ACQUIRE, __ATOMIC_RELAXED)) {
+		RTE_LOG(INFO, POWER, "Power management of lcore %u is "
+				"not used\n", lcore_id);
+		return -1;
+	}
+
+	/* Close FD of setting freq */
+	fclose(pi->f);
+	pi->f = NULL;
+
+	/* Set the governor back to the original */
+	if (power_set_governor_original(pi) < 0) {
+		RTE_LOG(ERR, POWER, "Cannot set the governor of %u back "
+				"to the original\n", lcore_id);
+		goto fail;
+	}
+
+	RTE_LOG(INFO, POWER, "Power management of lcore %u has exited from "
+			"'userspace' mode and been set back to the "
+			"original\n", lcore_id);
+	__atomic_store_n(&(pi->state), POWER_IDLE, __ATOMIC_RELEASE);
+
+	return 0;
+
+fail:
+	__atomic_store_n(&(pi->state), POWER_UNKNOWN, __ATOMIC_RELEASE);
+
+	return -1;
+}
+
+uint32_t
+power_amd_pstate_cpufreq_freqs(unsigned int lcore_id, uint32_t *freqs, uint32_t num)
+{
+	struct amd_pstate_power_info *pi;
+
+	if (lcore_id >= RTE_MAX_LCORE) {
+		RTE_LOG(ERR, POWER, "Invalid lcore ID\n");
+		return 0;
+	}
+
+	if (freqs == NULL) {
+		RTE_LOG(ERR, POWER, "NULL buffer supplied\n");
+		return 0;
+	}
+
+	pi = &lcore_power_info[lcore_id];
+	if (num < pi->nb_freqs) {
+		RTE_LOG(ERR, POWER, "Buffer size is not enough\n");
+		return 0;
+	}
+	rte_memcpy(freqs, pi->freqs, pi->nb_freqs * sizeof(uint32_t));
+
+	return pi->nb_freqs;
+}
+
+uint32_t
+power_amd_pstate_cpufreq_get_freq(unsigned int lcore_id)
+{
+	if (lcore_id >= RTE_MAX_LCORE) {
+		RTE_LOG(ERR, POWER, "Invalid lcore ID\n");
+		return RTE_POWER_INVALID_FREQ_INDEX;
+	}
+
+	return lcore_power_info[lcore_id].curr_idx;
+}
+
+int
+power_amd_pstate_cpufreq_set_freq(unsigned int lcore_id, uint32_t index)
+{
+	if (lcore_id >= RTE_MAX_LCORE) {
+		RTE_LOG(ERR, POWER, "Invalid lcore ID\n");
+		return -1;
+	}
+
+	return set_freq_internal(&(lcore_power_info[lcore_id]), index);
+}
+
+int
+power_amd_pstate_cpufreq_freq_down(unsigned int lcore_id)
+{
+	struct amd_pstate_power_info *pi;
+
+	if (lcore_id >= RTE_MAX_LCORE) {
+		RTE_LOG(ERR, POWER, "Invalid lcore ID\n");
+		return -1;
+	}
+
+	pi = &lcore_power_info[lcore_id];
+	if (pi->curr_idx + 1 == pi->nb_freqs)
+		return 0;
+
+	/* Frequencies in the array are from high to low. */
+	return set_freq_internal(pi, pi->curr_idx + 1);
+}
+
+int
+power_amd_pstate_cpufreq_freq_up(unsigned int lcore_id)
+{
+	struct amd_pstate_power_info *pi;
+
+	if (lcore_id >= RTE_MAX_LCORE) {
+		RTE_LOG(ERR, POWER, "Invalid lcore ID\n");
+		return -1;
+	}
+
+	pi = &lcore_power_info[lcore_id];
+	if (pi->curr_idx == 0 || (pi->curr_idx == pi->nom_idx &&
+		pi->turbo_available && !pi->turbo_enable))
+		return 0;
+
+	/* Frequencies in the array are from high to low. */
+	return set_freq_internal(pi, pi->curr_idx - 1);
+}
+
+int
+power_amd_pstate_cpufreq_freq_max(unsigned int lcore_id)
+{
+	if (lcore_id >= RTE_MAX_LCORE) {
+		RTE_LOG(ERR, POWER, "Invalid lcore ID\n");
+		return -1;
+	}
+
+	/* Frequencies in the array are from high to low. */
+	if (lcore_power_info[lcore_id].turbo_available) {
+		if (lcore_power_info[lcore_id].turbo_enable)
+			/* Set to Turbo */
+			return set_freq_internal(
+				&lcore_power_info[lcore_id], 0);
+		else
+			/* Set to max non-turbo */
+			return set_freq_internal(
+				&lcore_power_info[lcore_id],
+				lcore_power_info[lcore_id].nom_idx);
+	} else
+		return set_freq_internal(&lcore_power_info[lcore_id], 0);
+}
+
+int
+power_amd_pstate_cpufreq_freq_min(unsigned int lcore_id)
+{
+	struct amd_pstate_power_info *pi;
+
+	if (lcore_id >= RTE_MAX_LCORE) {
+		RTE_LOG(ERR, POWER, "Invalid lcore ID\n");
+		return -1;
+	}
+
+	pi = &lcore_power_info[lcore_id];
+
+	/* Frequencies in the array are from high to low. */
+	return set_freq_internal(pi, pi->nb_freqs - 1);
+}
+
+int
+power_amd_pstate_turbo_status(unsigned int lcore_id)
+{
+	struct amd_pstate_power_info *pi;
+
+	if (lcore_id >= RTE_MAX_LCORE) {
+		RTE_LOG(ERR, POWER, "Invalid lcore ID\n");
+		return -1;
+	}
+
+	pi = &lcore_power_info[lcore_id];
+
+	return pi->turbo_enable;
+}
+
+int
+power_amd_pstate_enable_turbo(unsigned int lcore_id)
+{
+	struct amd_pstate_power_info *pi;
+
+	if (lcore_id >= RTE_MAX_LCORE) {
+		RTE_LOG(ERR, POWER, "Invalid lcore ID\n");
+		return -1;
+	}
+
+	pi = &lcore_power_info[lcore_id];
+
+	if (pi->turbo_available)
+		pi->turbo_enable = 1;
+	else {
+		pi->turbo_enable = 0;
+		RTE_LOG(ERR, POWER,
+			"Failed to enable turbo on lcore %u\n",
+			lcore_id);
+		return -1;
+	}
+
+	/* TODO: must set to max once enabling Turbo? Considering add condition:
+	 * if ((pi->turbo_available) && (pi->curr_idx <= 1))
+	 */
+	/* Max may have changed, so call to max function */
+	if (power_amd_pstate_cpufreq_freq_max(lcore_id) < 0) {
+		RTE_LOG(ERR, POWER,
+			"Failed to set frequency of lcore %u to max\n",
+			lcore_id);
+		return -1;
+	}
+
+	return 0;
+}
+
+int
+power_amd_pstate_disable_turbo(unsigned int lcore_id)
+{
+	struct amd_pstate_power_info *pi;
+
+	if (lcore_id >= RTE_MAX_LCORE) {
+		RTE_LOG(ERR, POWER, "Invalid lcore ID\n");
+		return -1;
+	}
+
+	pi = &lcore_power_info[lcore_id];
+
+	pi->turbo_enable = 0;
+
+	if ((pi->turbo_available) && (pi->curr_idx <= pi->nom_idx)) {
+		/* Try to set freq to max by default coming out of turbo */
+		if (power_amd_pstate_cpufreq_freq_max(lcore_id) < 0) {
+			RTE_LOG(ERR, POWER,
+				"Failed to set frequency of lcore %u to max\n",
+				lcore_id);
+			return -1;
+		}
+	}
+
+	return 0;
+}
+
+int
+power_amd_pstate_get_capabilities(unsigned int lcore_id,
+		struct rte_power_core_capabilities *caps)
+{
+	struct amd_pstate_power_info *pi;
+
+	if (lcore_id >= RTE_MAX_LCORE) {
+		RTE_LOG(ERR, POWER, "Invalid lcore ID\n");
+		return -1;
+	}
+	if (caps == NULL) {
+		RTE_LOG(ERR, POWER, "Invalid argument\n");
+		return -1;
+	}
+
+	pi = &lcore_power_info[lcore_id];
+	caps->capabilities = 0;
+	caps->turbo = !!(pi->turbo_available);
+
+	return 0;
+}
diff --git a/lib/power/power_amd_pstate_cpufreq.h b/lib/power/power_amd_pstate_cpufreq.h
new file mode 100644
index 0000000000..b02f9f98e4
--- /dev/null
+++ b/lib/power/power_amd_pstate_cpufreq.h
@@ -0,0 +1,219 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2010-2021 Intel Corporation
+ * Copyright(c) 2021 Arm Limited
+ * Copyright(c) 2023 Amd Limited
+ */
+
+#ifndef _POWER_AMD_PSTATE_CPUFREQ_H
+#define _POWER_AMD_PSTATE_CPUFREQ_H
+
+/**
+ * @file
+ * RTE Power Management via userspace AMD pstate cpufreq
+ */
+
+#include "rte_power.h"
+
+/**
+ * Check if amd p-state power management is supported.
+ *
+ * @return
+ *   - 1 if supported
+ *   - 0 if unsupported
+ *   - -1 if error, with rte_errno indicating reason for error.
+ */
+int power_amd_pstate_cpufreq_check_supported(void);
+
+/**
+ * Initialize power management for a specific lcore. It will check and set the
+ * governor to userspace for the lcore, get the available frequencies, and
+ * prepare to set new lcore frequency.
+ *
+ * @param lcore_id
+ *  lcore id.
+ *
+ * @return
+ *  - 0 on success.
+ *  - Negative on error.
+ */
+int power_amd_pstate_cpufreq_init(unsigned int lcore_id);
+
+/**
+ * Exit power management on a specific lcore. It will set the governor to which
+ * is before initialized.
+ *
+ * @param lcore_id
+ *  lcore id.
+ *
+ * @return
+ *  - 0 on success.
+ *  - Negative on error.
+ */
+int power_amd_pstate_cpufreq_exit(unsigned int lcore_id);
+
+/**
+ * Get the available frequencies of a specific lcore. The return value will be
+ * the minimal one of the total number of available frequencies and the number
+ * of buffer. The index of available frequencies used in other interfaces
+ * should be in the range of 0 to this return value.
+ * It should be protected outside of this function for threadsafe.
+ *
+ * @param lcore_id
+ *  lcore id.
+ * @param freqs
+ *  The buffer array to save the frequencies.
+ * @param num
+ *  The number of frequencies to get.
+ *
+ * @return
+ *  The number of available frequencies.
+ */
+uint32_t power_amd_pstate_cpufreq_freqs(unsigned int lcore_id, uint32_t *freqs,
+		uint32_t num);
+
+/**
+ * Return the current index of available frequencies of a specific lcore. It
+ * will return 'RTE_POWER_INVALID_FREQ_INDEX = (~0)' if error.
+ * It should be protected outside of this function for threadsafe.
+ *
+ * @param lcore_id
+ *  lcore id.
+ *
+ * @return
+ *  The current index of available frequencies.
+ */
+uint32_t power_amd_pstate_cpufreq_get_freq(unsigned int lcore_id);
+
+/**
+ * Set the new frequency for a specific lcore by indicating the index of
+ * available frequencies.
+ * It should be protected outside of this function for threadsafe.
+ *
+ * @param lcore_id
+ *  lcore id.
+ * @param index
+ *  The index of available frequencies.
+ *
+ * @return
+ *  - 1 on success with frequency changed.
+ *  - 0 on success without frequency changed.
+ *  - Negative on error.
+ */
+int power_amd_pstate_cpufreq_set_freq(unsigned int lcore_id, uint32_t index);
+
+/**
+ * Scale up the frequency of a specific lcore according to the available
+ * frequencies.
+ * It should be protected outside of this function for threadsafe.
+ *
+ * @param lcore_id
+ *  lcore id.
+ *
+ * @return
+ *  - 1 on success with frequency changed.
+ *  - 0 on success without frequency changed.
+ *  - Negative on error.
+ */
+int power_amd_pstate_cpufreq_freq_up(unsigned int lcore_id);
+
+/**
+ * Scale down the frequency of a specific lcore according to the available
+ * frequencies.
+ * It should be protected outside of this function for threadsafe.
+ *
+ * @param lcore_id
+ *  lcore id.
+ *
+ * @return
+ *  - 1 on success with frequency changed.
+ *  - 0 on success without frequency changed.
+ *  - Negative on error.
+ */
+int power_amd_pstate_cpufreq_freq_down(unsigned int lcore_id);
+
+/**
+ * Scale up the frequency of a specific lcore to the highest according to the
+ * available frequencies.
+ * It should be protected outside of this function for threadsafe.
+ *
+ * @param lcore_id
+ *  lcore id.
+ *
+ * @return
+ *  - 1 on success with frequency changed.
+ *  - 0 on success without frequency changed.
+ *  - Negative on error.
+ */
+int power_amd_pstate_cpufreq_freq_max(unsigned int lcore_id);
+
+/**
+ * Scale down the frequency of a specific lcore to the lowest according to the
+ * available frequencies.
+ * It should be protected outside of this function for threadsafe.
+ *
+ * @param lcore_id
+ *  lcore id.
+ *
+ * @return
+ *  - 1 on success with frequency changed.
+ *  - 0 on success without frequency changed.
+ *  - Negative on error.
+ */
+int power_amd_pstate_cpufreq_freq_min(unsigned int lcore_id);
+
+/**
+ * Get the turbo status of a specific lcore.
+ * It should be protected outside of this function for threadsafe.
+ *
+ * @param lcore_id
+ *  lcore id.
+ *
+ * @return
+ *  - 1 Turbo Boost is enabled on this lcore.
+ *  - 0 Turbo Boost is disabled on this lcore.
+ *  - Negative on error.
+ */
+int power_amd_pstate_turbo_status(unsigned int lcore_id);
+
+/**
+ * Enable Turbo Boost on a specific lcore.
+ * It should be protected outside of this function for threadsafe.
+ *
+ * @param lcore_id
+ *  lcore id.
+ *
+ * @return
+ *  - 0 Turbo Boost is enabled successfully on this lcore.
+ *  - Negative on error.
+ */
+int power_amd_pstate_enable_turbo(unsigned int lcore_id);
+
+/**
+ * Disable Turbo Boost on a specific lcore.
+ * It should be protected outside of this function for threadsafe.
+ *
+ * @param lcore_id
+ *  lcore id.
+ *
+ * @return
+ *  - 0 Turbo Boost disabled successfully on this lcore.
+ *  - Negative on error.
+ */
+int power_amd_pstate_disable_turbo(unsigned int lcore_id);
+
+/**
+ * Returns power capabilities for a specific lcore.
+ *
+ * @param lcore_id
+ *  lcore id.
+ * @param caps
+ *  pointer to rte_power_core_capabilities object.
+ *
+ * @return
+ *  - 0 on success.
+ *  - Negative on error.
+ */
+int power_amd_pstate_get_capabilities(unsigned int lcore_id,
+		struct rte_power_core_capabilities *caps);
+
+#endif /* _POWER_AMD_PSTATET_CPUFREQ_H */
diff --git a/lib/power/rte_power.c b/lib/power/rte_power.c
index 63a43bd8f5..48c2e6b428 100644
--- a/lib/power/rte_power.c
+++ b/lib/power/rte_power.c
@@ -12,6 +12,7 @@
 #include "power_cppc_cpufreq.h"
 #include "power_kvm_vm.h"
 #include "power_pstate_cpufreq.h"
+#include "power_amd_pstate_cpufreq.h"
 
 enum power_management_env global_default_env = PM_ENV_NOT_SET;
 
@@ -58,6 +59,8 @@ rte_power_check_env_supported(enum power_management_env env)
 		return power_kvm_vm_check_supported();
 	case PM_ENV_CPPC_CPUFREQ:
 		return power_cppc_cpufreq_check_supported();
+	case PM_ENV_AMD_PSTATE_CPUFREQ:
+		return power_amd_pstate_cpufreq_check_supported();
 	default:
 		rte_errno = EINVAL;
 		return -1;
@@ -126,6 +129,18 @@ rte_power_set_env(enum power_management_env env)
 		rte_power_freq_enable_turbo = power_cppc_enable_turbo;
 		rte_power_freq_disable_turbo = power_cppc_disable_turbo;
 		rte_power_get_capabilities = power_cppc_get_capabilities;
+	} else if (env == PM_ENV_AMD_PSTATE_CPUFREQ) {
+		rte_power_freqs = power_amd_pstate_cpufreq_freqs;
+		rte_power_get_freq = power_amd_pstate_cpufreq_get_freq;
+		rte_power_set_freq = power_amd_pstate_cpufreq_set_freq;
+		rte_power_freq_up = power_amd_pstate_cpufreq_freq_up;
+		rte_power_freq_down = power_amd_pstate_cpufreq_freq_down;
+		rte_power_freq_min = power_amd_pstate_cpufreq_freq_min;
+		rte_power_freq_max = power_amd_pstate_cpufreq_freq_max;
+		rte_power_turbo_status = power_amd_pstate_turbo_status;
+		rte_power_freq_enable_turbo = power_amd_pstate_enable_turbo;
+		rte_power_freq_disable_turbo = power_amd_pstate_disable_turbo;
+		rte_power_get_capabilities = power_amd_pstate_get_capabilities;
 	} else {
 		RTE_LOG(ERR, POWER, "Invalid Power Management Environment(%d) set\n",
 				env);
@@ -171,6 +186,8 @@ rte_power_init(unsigned int lcore_id)
 		return power_pstate_cpufreq_init(lcore_id);
 	case PM_ENV_CPPC_CPUFREQ:
 		return power_cppc_cpufreq_init(lcore_id);
+	case PM_ENV_AMD_PSTATE_CPUFREQ:
+		return power_amd_pstate_cpufreq_init(lcore_id);
 	default:
 		RTE_LOG(INFO, POWER, "Env isn't set yet!\n");
 	}
@@ -190,6 +207,13 @@ rte_power_init(unsigned int lcore_id)
 		goto out;
 	}
 
+	RTE_LOG(INFO, POWER, "Attempting to initialise AMD PSTATE power management...\n");
+	ret = power_amd_pstate_cpufreq_init(lcore_id);
+	if (ret == 0) {
+		rte_power_set_env(PM_ENV_AMD_PSTATE_CPUFREQ);
+		goto out;
+	}
+
 	RTE_LOG(INFO, POWER, "Attempting to initialise CPPC power management...\n");
 	ret = power_cppc_cpufreq_init(lcore_id);
 	if (ret == 0) {
@@ -221,6 +245,8 @@ rte_power_exit(unsigned int lcore_id)
 		return power_pstate_cpufreq_exit(lcore_id);
 	case PM_ENV_CPPC_CPUFREQ:
 		return power_cppc_cpufreq_exit(lcore_id);
+	case PM_ENV_AMD_PSTATE_CPUFREQ:
+		return power_amd_pstate_cpufreq_exit(lcore_id);
 	default:
 		RTE_LOG(ERR, POWER, "Environment has not been set, unable to exit gracefully\n");
 
diff --git a/lib/power/rte_power.h b/lib/power/rte_power.h
index 5e2b87c775..2e011a7246 100644
--- a/lib/power/rte_power.h
+++ b/lib/power/rte_power.h
@@ -21,7 +21,8 @@ extern "C" {
 
 /* Power Management Environment State */
 enum power_management_env {PM_ENV_NOT_SET, PM_ENV_ACPI_CPUFREQ, PM_ENV_KVM_VM,
-		PM_ENV_PSTATE_CPUFREQ, PM_ENV_CPPC_CPUFREQ};
+		PM_ENV_PSTATE_CPUFREQ, PM_ENV_CPPC_CPUFREQ,
+		PM_ENV_AMD_PSTATE_CPUFREQ};
 
 /**
  * @warning
diff --git a/lib/power/rte_power_pmd_mgmt.c b/lib/power/rte_power_pmd_mgmt.c
index ca1840387c..3fe8ed77ba 100644
--- a/lib/power/rte_power_pmd_mgmt.c
+++ b/lib/power/rte_power_pmd_mgmt.c
@@ -421,7 +421,8 @@ check_scale(unsigned int lcore)
 
 	/* only PSTATE and ACPI modes are supported */
 	if (!rte_power_check_env_supported(PM_ENV_ACPI_CPUFREQ) &&
-	    !rte_power_check_env_supported(PM_ENV_PSTATE_CPUFREQ)) {
+	    !rte_power_check_env_supported(PM_ENV_PSTATE_CPUFREQ) &&
+	    !rte_power_check_env_supported(PM_ENV_AMD_PSTATE_CPUFREQ)) {
 		RTE_LOG(DEBUG, POWER, "Neither ACPI nor PSTATE modes are supported\n");
 		return -ENOTSUP;
 	}
@@ -431,7 +432,8 @@ check_scale(unsigned int lcore)
 
 	/* ensure we initialized the correct env */
 	env = rte_power_get_env();
-	if (env != PM_ENV_ACPI_CPUFREQ && env != PM_ENV_PSTATE_CPUFREQ) {
+	if (env != PM_ENV_ACPI_CPUFREQ && env != PM_ENV_PSTATE_CPUFREQ &&
+			env != PM_ENV_AMD_PSTATE_CPUFREQ) {
 		RTE_LOG(DEBUG, POWER, "Neither ACPI nor PSTATE modes were initialized\n");
 		return -ENOTSUP;
 	}
-- 
2.34.1

Re: [PATCH v1] power: support amd-pstate cpufreq driver

[Thomas Monjalon]

12/04/2023 11:52, Sivaprasad Tummala:
> amd-pstate introduces a new CPU frequency control mechanism for AMD
> processors using the ACPI Collaborative Performance Power Control
> feature for a finer grained frequency management.
> 
> Patch to add support for amd-pstate driver.
> 
> Signed-off-by: Sivaprasad Tummala <Sivaprasad.Tummala@amd.com>
> ---
>  app/test/test_power.c                  |   1 +
>  app/test/test_power_cpufreq.c          |   5 +-
>  doc/guides/rel_notes/release_23_07.rst |   3 +
>  examples/l3fwd-power/main.c            |   1 +
>  lib/power/meson.build                  |   1 +
>  lib/power/power_amd_pstate_cpufreq.c   | 698 +++++++++++++++++++++++++
>  lib/power/power_amd_pstate_cpufreq.h   | 219 ++++++++
>  lib/power/rte_power.c                  |  26 +
>  lib/power/rte_power.h                  |   3 +-
>  lib/power/rte_power_pmd_mgmt.c         |   6 +-
>  10 files changed, 958 insertions(+), 5 deletions(-)

I'm not comfortable to merge this patch without a word from David Hunt.
Given there is 0 review, what do we do?


>       Also, make sure to start the actual text at the margin.
>       =======================================================
>  
> +   * **Added amd-pstate driver support to power management library.**
> +
> +        Added support for amd-pstate driver which works on AMD Zen processors.

Looks like the indent is not correct.

>          'power_pstate_cpufreq.c',
> +        'power_amd_pstate_cpufreq.c',

Can you say briefly why AMD has a different pstate?
Does it mean power_pstate_cpufreq.c should be renamed
power_intel_pstate_cpufreq.c?

> +++ b/lib/power/power_amd_pstate_cpufreq.c
> @@ -0,0 +1,698 @@
> +/* SPDX-License-Identifier: BSD-3-Clause
> + * Copyright(c) 2010-2021 Intel Corporation
> + * Copyright(c) 2021 Arm Limited

Why is there copyright for Intel and Arm?
Does it mean you copied some code and did not try
to keep common code in a common place?

> + * Copyright(c) 2023 Amd Limited

Re: [PATCH v1] power: support amd-pstate cpufreq driver

[Burakov, Anatoly]

On 5/24/2023 7:46 PM, Thomas Monjalon wrote:
> 12/04/2023 11:52, Sivaprasad Tummala:
>> amd-pstate introduces a new CPU frequency control mechanism for AMD
>> processors using the ACPI Collaborative Performance Power Control
>> feature for a finer grained frequency management.
>>
>> Patch to add support for amd-pstate driver.
>>
>> Signed-off-by: Sivaprasad Tummala <Sivaprasad.Tummala@amd.com>
>> ---
>>   app/test/test_power.c                  |   1 +
>>   app/test/test_power_cpufreq.c          |   5 +-
>>   doc/guides/rel_notes/release_23_07.rst |   3 +
>>   examples/l3fwd-power/main.c            |   1 +
>>   lib/power/meson.build                  |   1 +
>>   lib/power/power_amd_pstate_cpufreq.c   | 698 +++++++++++++++++++++++++
>>   lib/power/power_amd_pstate_cpufreq.h   | 219 ++++++++
>>   lib/power/rte_power.c                  |  26 +
>>   lib/power/rte_power.h                  |   3 +-
>>   lib/power/rte_power_pmd_mgmt.c         |   6 +-
>>   10 files changed, 958 insertions(+), 5 deletions(-)
> 
> I'm not comfortable to merge this patch without a word from David Hunt.
> Given there is 0 review, what do we do?
> 
> 
>>        Also, make sure to start the actual text at the margin.
>>        =======================================================
>>   
>> +   * **Added amd-pstate driver support to power management library.**
>> +
>> +        Added support for amd-pstate driver which works on AMD Zen processors.
> 
> Looks like the indent is not correct.
> 
>>           'power_pstate_cpufreq.c',
>> +        'power_amd_pstate_cpufreq.c',
> 
> Can you say briefly why AMD has a different pstate?
> Does it mean power_pstate_cpufreq.c should be renamed
> power_intel_pstate_cpufreq.c?
> 
>> +++ b/lib/power/power_amd_pstate_cpufreq.c
>> @@ -0,0 +1,698 @@
>> +/* SPDX-License-Identifier: BSD-3-Clause
>> + * Copyright(c) 2010-2021 Intel Corporation
>> + * Copyright(c) 2021 Arm Limited
> 
> Why is there copyright for Intel and Arm?
> Does it mean you copied some code and did not try
> to keep common code in a common place?
> 

Yes, most of it appears to be copied from Intel pstate code, so the 
copyright would be correct here.

I don't know if we can merge these into one, to be honest - while a lot 
of it is shared (like, a lot), there are some subtle differences in code 
that might prevent us from sharing the code paths - joys of C.

-- 
Thanks,
Anatoly

Re: [PATCH v1] power: support amd-pstate cpufreq driver

[Burakov, Anatoly]

On 4/12/2023 10:52 AM, Sivaprasad Tummala wrote:
> amd-pstate introduces a new CPU frequency control mechanism for AMD
> processors using the ACPI Collaborative Performance Power Control
> feature for a finer grained frequency management.
> 
> Patch to add support for amd-pstate driver.
> 
> Signed-off-by: Sivaprasad Tummala <Sivaprasad.Tummala@amd.com>
> ---

I don't have an AMD machine handy so I can't test this, but code wise, 
LGTM bar one nitpick below.

Acked-by: Anatoly Burakov <anatoly.burakov@intel.com>

> +	}
> +
> +	ret = read_core_sysfs_u32(f_nom, &nominal_freq);
> +	if (ret < 0) {
> +		RTE_LOG(ERR, POWER, "Failed to read %s\n",
> +				POWER_SYSFILE_NOMINAL_FREQ);
> +		goto out;
> +	}
> +
> +	power_check_turbo(pi);
> +
> +	if (scaling_max_freq < scaling_min_freq)

It would be nice if this produced an error message of some kind.

-- 
Thanks,
Anatoly

RE: [PATCH v1] power: support amd-pstate cpufreq driver

[Tummala, Sivaprasad]

[AMD Official Use Only - General]

Hi Thomas,

> -----Original Message-----
> From: Thomas Monjalon <thomas@monjalon.net>
> Sent: Thursday, May 25, 2023 12:17 AM
> To: Tummala, Sivaprasad <Sivaprasad.Tummala@amd.com>
> Cc: david.hunt@intel.com; dev@dpdk.org; Yigit, Ferruh <Ferruh.Yigit@amd.com>;
> anatoly.burakov@intel.com; Laatz, Kevin <kevin.laatz@intel.com>
> Subject: Re: [PATCH v1] power: support amd-pstate cpufreq driver
>
> Caution: This message originated from an External Source. Use proper caution
> when opening attachments, clicking links, or responding.
>
>
> 12/04/2023 11:52, Sivaprasad Tummala:
> > amd-pstate introduces a new CPU frequency control mechanism for AMD
> > processors using the ACPI Collaborative Performance Power Control
> > feature for a finer grained frequency management.
> >
> > Patch to add support for amd-pstate driver.
> >
> > Signed-off-by: Sivaprasad Tummala <Sivaprasad.Tummala@amd.com>
> > ---
> >  app/test/test_power.c                  |   1 +
> >  app/test/test_power_cpufreq.c          |   5 +-
> >  doc/guides/rel_notes/release_23_07.rst |   3 +
> >  examples/l3fwd-power/main.c            |   1 +
> >  lib/power/meson.build                  |   1 +
> >  lib/power/power_amd_pstate_cpufreq.c   | 698
> +++++++++++++++++++++++++
> >  lib/power/power_amd_pstate_cpufreq.h   | 219 ++++++++
> >  lib/power/rte_power.c                  |  26 +
> >  lib/power/rte_power.h                  |   3 +-
> >  lib/power/rte_power_pmd_mgmt.c         |   6 +-
> >  10 files changed, 958 insertions(+), 5 deletions(-)
>
> I'm not comfortable to merge this patch without a word from David Hunt.
> Given there is 0 review, what do we do?
Yes, we are waiting for feedback from the community on this patch.
>
>
> >       Also, make sure to start the actual text at the margin.
> >
> ====================================================
> ===
> >
> > +   * **Added amd-pstate driver support to power management library.**
> > +
> > +        Added support for amd-pstate driver which works on AMD Zen processors.
>
> Looks like the indent is not correct.
Sure, will fix it in v2 patch
>
> >          'power_pstate_cpufreq.c',
> > +        'power_amd_pstate_cpufreq.c',
>
> Can you say briefly why AMD has a different pstate?
> Does it mean power_pstate_cpufreq.c should be renamed
> power_intel_pstate_cpufreq.c?
amd-pstate is the new AMD CPU performance scaling driver based on CPPC.
It is implemented as a new kernel driver and we need a different library from
Power_pstate_cpufreq. Yes, it makes sense to rename this, inline with the
Linux kernel as indicated below.
linux/latest/source/drivers/cpufreq
 -  amd-pstate.c
 -   cppc_cpufreq.c
 -   intel_pstate.c
>
> > +++ b/lib/power/power_amd_pstate_cpufreq.c
> > @@ -0,0 +1,698 @@
> > +/* SPDX-License-Identifier: BSD-3-Clause
> > + * Copyright(c) 2010-2021 Intel Corporation
> > + * Copyright(c) 2021 Arm Limited
>
> Why is there copyright for Intel and Arm?
> Does it mean you copied some code and did not try to keep common code in a
> common place?
Yes, few internal functions follow similar notion as power_cppc_cpufreq.c
>
> > + * Copyright(c) 2023 Amd Limited
>
>

Thanks & Regards,
Sivaprasad