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Wed, 9 Sep 2020 07:16:34 +0000 From: "Yang, Qiming" To: "Zhang, Qi Z" CC: "dev@dpdk.org" Thread-Topic: [PATCH 00/40] ice base code update Thread-Index: AQHWhQl5E+NGfc52NEa5zlUEMUl/Vqlf6BpQ Date: Wed, 9 Sep 2020 07:16:34 +0000 Message-ID: References: <20200907112826.48493-1-qi.z.zhang@intel.com> In-Reply-To: <20200907112826.48493-1-qi.z.zhang@intel.com> Accept-Language: en-US, zh-CN Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: intel.com; dkim=none (message not signed) header.d=none;intel.com; dmarc=none action=none header.from=intel.com; x-originating-ip: [192.102.204.37] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: 0ec79713-47ae-4dfc-05b0-08d8549048cf x-ms-traffictypediagnostic: BN6PR11MB3938: x-ld-processed: 46c98d88-e344-4ed4-8496-4ed7712e255d,ExtAddr x-ms-exchange-transport-forked: True x-microsoft-antispam-prvs: x-ms-oob-tlc-oobclassifiers: OLM:741; x-ms-exchange-senderadcheck: 1 x-microsoft-antispam: BCL:0; x-microsoft-antispam-message-info: klFu+hEdj6ePo7RMF+4hjv6f9YSXinudmFE8WbxjCgUxl8jqhdiXcm6Y+/VsXevbJhXE1VBLNy576kyTEKuGp16cH69zA5mVAlLLVkWuJDkg63KZmc1iF2DKB3xcss8iDM3BM7ZfIMn5ieFH+SrXE0QZUd7hXM80EmAz9m5BEVQ2REs6RvzbRjleGYhgiPpOW2xSg3SFyDVabjEBOOrTWZOsPWdNLVcbm7WsfxzhDpglzBHFq8RDoMLnkpqgNZB98s7kwrmyMI0fj+P1nWu4I2Jp//+rhUxp8QvYRSWRhrePx5OowjKPhg3eH4TtpYPCUN6dCftXRZ9cMH+4J32qZg== x-forefront-antispam-report: CIP:255.255.255.255; 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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: BN6PR11MB0017.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 0ec79713-47ae-4dfc-05b0-08d8549048cf X-MS-Exchange-CrossTenant-originalarrivaltime: 09 Sep 2020 07:16:34.5556 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: dzgT8EDZfqF8USTyv46NuGe5ZaO3XJZlDEbKmMj0elGaGK/HBEO52lwwOyATAYxkt7TcrzvwGGjt/5L5Q1eE2A== X-MS-Exchange-Transport-CrossTenantHeadersStamped: BN6PR11MB3938 X-OriginatorOrg: intel.com Subject: Re: [dpdk-dev] [PATCH 00/40] ice base code update X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" > -----Original Message----- > From: Zhang, Qi Z > Sent: Monday, September 7, 2020 19:28 > To: Yang, Qiming > Cc: dev@dpdk.org; Zhang, Qi Z > Subject: [PATCH 00/40] ice base code update >=20 > main changes: > 1. Added support for outer IP filter for GTPC. > 2. Added support for outer IP filter for GPTU control packet (no inner IP= ) 3. > Added support for QinQ switch filter 4. code refactor and bug fixes >=20 > Qi Zhang (40): > net/ice/base: handle error gracefully in HW table calloc > net/ice/base: split caps discover into two functions > net/ice/base: avoid unnecessary single-member variable-length structs > net/ice/base: fix issues around move nodes > net/ice/base: cleanup stack hog > net/ice/base: clean the code wrapping > net/ice/base: cleanup misleading comment > net/ice/base: silence static analysis warning > net/ice/base: replace single-element array used for C struct hack > net/ice/base: introduce and use bitmap set API > net/ice/base: introduce and use bitmap hamming weight API > net/ice/base: add function header > net/ice/base: introduce and use for each bit iterator > net/ice/base: correct abbreviations > net/ice/base: add AQ cmd 0X0A0A LLDP fltr control > net/ice/base: add support for GTP-U type switch rule > net/ice/base: join format strings to same line > net/ice/base: introduce Tx rate limiting on port level > net/ice/base: reduce profile to recip info get from firmware > net/ice/base: refactor DCB related variables > net/ice/base: support outer IP filter for GTPC > net/ice/base: support outer IP filter for GTPU without inner IP > net/ice/base: move a function > net/ice/base: clear advanced rules in reset preparation > net/ice/base: move a function > net/ice/base: add check for failed acts allocation > net/ice/base: remove repeated words > net/ice/base: remove function ACL count query > net/ice/base: preserve NVM capabilities in safe mode > net/ice/base: misc minor ACL changes > net/ice/base: adjust rate limit profile ids runtime database > net/ice/base: enable QinQ filter for switch advanced rule > net/ice/base: create flash info structure and separate NVM version > net/ice/base: remove unused parameter > net/ice/base: minor code clean > net/ice/base: cache NVM module bank information > net/ice/base: rename function > net/ice/base: remove unnecessary conditional > net/ice/base: rename ACL priority values > net/ice/base: preserve default aggr vsi information >=20 > drivers/net/ice/base/ice_acl.c | 40 +- > drivers/net/ice/base/ice_acl.h | 22 +- > drivers/net/ice/base/ice_acl_ctrl.c | 200 ++++---- > drivers/net/ice/base/ice_adminq_cmd.h | 83 +--- > drivers/net/ice/base/ice_bitops.h | 47 ++ > drivers/net/ice/base/ice_common.c | 434 +++++++++--------- > drivers/net/ice/base/ice_common.h | 6 +- > drivers/net/ice/base/ice_controlq.c | 42 +- > drivers/net/ice/base/ice_dcb.c | 44 +- > drivers/net/ice/base/ice_dcb.h | 10 +- > drivers/net/ice/base/ice_flex_pipe.c | 266 ++++++----- > drivers/net/ice/base/ice_flex_type.h | 49 +- > drivers/net/ice/base/ice_flow.c | 280 ++++++------ > drivers/net/ice/base/ice_flow.h | 1 + > drivers/net/ice/base/ice_nvm.c | 293 ++++++++---- > drivers/net/ice/base/ice_protocol_type.h | 15 + > drivers/net/ice/base/ice_sched.c | 213 +++++---- > drivers/net/ice/base/ice_sched.h | 10 +- > drivers/net/ice/base/ice_switch.c | 755 > +++++++++++++++++++++++++------ > drivers/net/ice/base/ice_switch.h | 60 ++- > drivers/net/ice/base/ice_type.h | 77 +++- > drivers/net/ice/ice_ethdev.c | 20 +- > 22 files changed, 1803 insertions(+), 1164 deletions(-) >=20 > -- > 2.13.6 Acked-by: Qiming Yang