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From: "Wang, Haiyue" <haiyue.wang@intel.com>
To: "Guo, Junfeng" <junfeng.guo@intel.com>,
	"Zhang, Qi Z" <qi.z.zhang@intel.com>,
	"Wu, Jingjing" <jingjing.wu@intel.com>,
	"Xing, Beilei" <beilei.xing@intel.com>
Cc: "dev@dpdk.org" <dev@dpdk.org>
Subject: Re: [dpdk-dev] [PATCH] net/ice: add support for Auxiliary IP Offset Rx descriptor
Date: Mon, 31 Aug 2020 05:33:37 +0000	[thread overview]
Message-ID: <BN8PR11MB379501630F89E7E9BAC1F3FBF7510@BN8PR11MB3795.namprd11.prod.outlook.com> (raw)
In-Reply-To: <20200826032141.333400-1-junfeng.guo@intel.com>

> -----Original Message-----
> From: Guo, Junfeng <junfeng.guo@intel.com>
> Sent: Wednesday, August 26, 2020 11:22
> To: Zhang, Qi Z <qi.z.zhang@intel.com>; Wu, Jingjing <jingjing.wu@intel.com>; Xing, Beilei
> <beilei.xing@intel.com>
> Cc: dev@dpdk.org; Wang, Haiyue <haiyue.wang@intel.com>; Guo, Junfeng <junfeng.guo@intel.com>
> Subject: [PATCH] net/ice: add support for Auxiliary IP Offset Rx descriptor
> 
> Add RXDID #25 to support Auxiliary IP Offset Rx descriptor, including
> 	FlexiMD.4: Outer/Single IPv4 Header offset
> 	FlexiMD.5: Outer/Single IPv6 Header offset
> And parse the valid IP Offset into mbuf by flexible descriptor
> section via devargs "proto_xtr" with "proto_xtr=ip_offset".
> 
> This patch depends on:
> commit e0c8ed904083 (net/ice: optimize the FlexiMD hardware check)
> 
> Signed-off-by: Junfeng Guo <junfeng.guo@intel.com>
> ---
>  doc/guides/nics/ice.rst                 | 14 ++++-
>  drivers/net/ice/base/ice_lan_tx_rx.h    |  1 +
>  drivers/net/ice/ice_ethdev.c            | 10 +++-
>  drivers/net/ice/ice_ethdev.h            |  1 +
>  drivers/net/ice/ice_rxtx.c              | 77 +++++++++++++++++--------
>  drivers/net/ice/rte_pmd_ice.h           | 13 +++++
>  drivers/net/ice/rte_pmd_ice_version.map |  1 +
>  7 files changed, 90 insertions(+), 27 deletions(-)
> 

[...]

> +		/**
> +		 * No need to check XTR_MD.#_VLD bit in Status/Error fields for
> +		 * Protocol Offset according to CPK HAS 7.9.8.
> +		 */

These comments are no need, since HAS doc session is internal information, and the
code is clean enough: if (chk_valid) ... else...

> +		if (rte_le_to_cpu_16(desc->flex_ts.flex.aux0) != 0xFFFF)
> +			metadata = rte_le_to_cpu_16(desc->flex_ts.flex.aux0);
> +		else if (rte_le_to_cpu_16(desc->flex_ts.flex.aux1) != 0xFFFF)
> +			metadata = rte_le_to_cpu_16(desc->flex_ts.flex.aux1);

Others,

Acked-by: Haiyue Wang <haiyue.wang@intel.com>

> 2.25.1


  reply	other threads:[~2020-08-31  5:35 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-08-26  3:21 Junfeng Guo
2020-08-31  5:33 ` Wang, Haiyue [this message]
2020-08-31  5:46   ` Zhang, Qi Z

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