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From: Harman Kalra <hkalra@marvell.com>
To: Thomas Monjalon <thomas@monjalon.net>
CC: Nithin Kumar Dabilpuram <ndabilpuram@marvell.com>, Kiran Kumar
Kokkilagadda <kirankumark@marvell.com>,
Sunil Kumar Kori <skori@marvell.com>,
Satha Koteswara Rao Kottidi <skoteshwar@marvell.com>, "dev@dpdk.org"
<dev@dpdk.org>, Jerin Jacob Kollanukkaran <jerinj@marvell.com>
Subject: RE: [EXT] Re: [PATCH v2 24/24] doc: port representors in cnxk
Thread-Topic: [EXT] Re: [PATCH v2 24/24] doc: port representors in cnxk
Thread-Index: AQHaMqKkRs6KDfHJZUacUDRUy4kazrCx6wwAgAHLu8A=
Date: Thu, 21 Dec 2023 13:28:58 +0000
Message-ID: <BN9PR18MB4204E5ED1DFC08AC548DF10EC595A@BN9PR18MB4204.namprd18.prod.outlook.com>
References: <20230811163419.165790-1-hkalra@marvell.com>
<20231219174003.72901-1-hkalra@marvell.com>
<20231219174003.72901-25-hkalra@marvell.com> <3113395.8hb0ThOEGa@thomas>
In-Reply-To: <3113395.8hb0ThOEGa@thomas>
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Errors-To: dev-bounces@dpdk.org
Hi Thomas,
Thanks for reviewing.
Please find responses inline.
Thanks
Harman
> -----Original Message-----
> From: Thomas Monjalon <thomas@monjalon.net>
> Sent: Wednesday, December 20, 2023 3:08 PM
> To: Harman Kalra <hkalra@marvell.com>
> Cc: Nithin Kumar Dabilpuram <ndabilpuram@marvell.com>; Kiran Kumar
> Kokkilagadda <kirankumark@marvell.com>; Sunil Kumar Kori
> <skori@marvell.com>; Satha Koteswara Rao Kottidi
> <skoteshwar@marvell.com>; dev@dpdk.org; Jerin Jacob Kollanukkaran
> <jerinj@marvell.com>
> Subject: [EXT] Re: [PATCH v2 24/24] doc: port representors in cnxk
>=20
> External Email
>=20
> ----------------------------------------------------------------------
> 19/12/2023 18:40, Harman Kalra:
> > +The CNXK driver supports port representor model by adding virtual
> > +ethernet ports providing a logical representation in DPDK for
> > +physical function(PF) or SR-IOV virtual function (VF) devices for cont=
rol
> and monitoring.
> > +
> > +Base device or parent device underneath these representor ports is a
> > +eswitch device which is not a cnxk ethernet device but has NIC RX and =
TX
> capabilities.
> > +Each representor port is represented by a RQ and SQ pair of this
> > +eswitch device.
> > +
> > +Current implementation supports representors for both physical
> > +function and virtual function.
>=20
> A doc comes with its implementation, so no need to say "current
> implementation".
Ack, I will fix this.
>=20
> > +
> > +These port representor ethdev instances can be spawned on an as
> > +needed basis through configuration parameters passed to the driver of
> > +the underlying base device using devargs ``-a <base PCI
> > +BDF>,representor=3Dpf*vf*``
> > +
> > +.. note::
> > +
> > + Representor ports to be created for respective representees should =
be
> > + defined via these representor devargs.
> > + Eg. To create a representor for representee PF1VF0, devargs to be
> passed
> > + is ``-a <base PCI BDF>,representor=3Dpf0vf0``
> > +
> > + For PF representor
> > + ``-a <base PCI BDF>,representor=3Dpf2``
> > +
> > + For defining range of vfs, say 5 representor ports under a PF
> > + ``-a <base PCI BDF>,representor=3Dpf0vf[0-4]``
> > +
> > + For representing different VFs under different PFs
> > + ``-a <base PCI
> > + BDF>,representor=3Dpf0vf[1,2],representor=3Dpf1vf[2-5]``
>=20
> It looks like something we should describe globally for ethdev, instead o=
f
> driver documentation.
DPDK generic representor devarg parser (rte_eth_devargs_parse_representor_=
ports()) can parse first
3 cases i.e. a <base PCI BDF>,representor=3Dpf0vf0 .... ``-a <base PCI BDF>=
,representor=3Dpf0vf[0-4]``,
while 4 case was a special case which our PMD needs.
Representor devargs are processed as part of new device (eswitch) PMD only,=
normal CNXK
PMD won't accept representor as a devarg. Hence all devargs we define under=
eswitch PCI device
and all the required representors are created while probing eswitch device =
probing.
In the following format we are defining representors for which PFs and VFs =
should be created:
Eg.=20
-a <base PCI BDF >,representor=3Dpf0vf[1,2],representor=3Dpf1vf[2-5]
Here
VF representor will be created only for PF0VF1, PF2VF2, PF1VF2.....PF1VF5
Although there may be n no of PF VF combinations but user wants representor=
s for this devices only.
Please let us know your opinion if "-a <base PCI BDF >,representor=3Dpf0vf[=
1,2],representor=3Dpf1vf[2-5]"
format handling can also be handled in common code. We can push a separate =
patch for it.
>=20
> > +In case of exception path (i.e. until the flow definition is
> > +offloaded to the hardware), packets transmitted by the VFs shall be
> > +received by these representor port, while packets transmitted by
> > +representor ports shall be received by respective VFs.
>=20
> Not clear. How is it related to any offload?
Point what I wanted to highlight here is, until the flow rule for a fastpat=
h is identified
and installed (offloaded) to the HW, packet flow will take the slow path (e=
xception path)
i.e. for every packet sent out via VF should be received by its represento=
r port and
vice versa.
Once the application installs the rule packets can take fast path i.e. dire=
ctly
from VF to destination (wire or other VF), representors will not come in th=
e=20
datapath for fast processing.
>=20
> > +On receiving the VF traffic via these representor ports, applications
> > +holding these representor ports can decide to offload the traffic flow=
into
> the HW.
> > +Henceforth the matching traffic shall be directly steered to the
> > +respective VFs without being received by the application.
>=20
> Using "these" makes no sense here. Please prefer "the representor ports".
Ack, will fix this
>=20
> > +Current virtual representor port PMD supports following operations:
>=20
> Again, no need of "current".
Ack, will fix this
>=20
> [...]
> > +---+------------+-------------------------------------------------=
------+
> > | 2 | NPC | --log-level=3D'pmd\.net.cnxk\.flow,8' =
|
> >
> > +---+------------+----------------------------------------------------
> > ---+
> > + | 3 | REP | --log-level=3D'pmd\.net.cnxk\.rep,8' =
|
> > + +---+------------+-------------------------------------------------=
------+
> > + | 4 | ESW | --log-level=3D'pmd\.net.cnxk\.esw,8' =
|
> > +
> > + +---+------------+--------------------------------------------------
> > + -----+
>=20
> Why it is not aligned?
Sorry, my bad I will fix this
>=20
> > --- a/doc/guides/nics/features/cnxk_vf.ini
> > +++ b/doc/guides/nics/features/cnxk_vf.ini
> > @@ -64,6 +64,8 @@ mpls =3D Y
> > nvgre =3D Y
> > pppoes =3D Y
> > raw =3D Y
> > +represented_port =3D Y
> > +port_representor =3D Y
> > sctp =3D Y
>=20
> It should be in alphabetical order.
Ack, will fix this
>=20
>=20