From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from na01-by2-obe.outbound.protection.outlook.com (mail-by2on0117.outbound.protection.outlook.com [207.46.100.117]) by dpdk.org (Postfix) with ESMTP id 7DEB25A71 for ; Thu, 16 Jul 2015 09:50:04 +0200 (CEST) Received: from BY1PR03MB1339.namprd03.prod.outlook.com (10.162.109.21) by BY1PR03MB1466.namprd03.prod.outlook.com (10.162.210.12) with Microsoft SMTP Server (TLS) id 15.1.213.14; Thu, 16 Jul 2015 07:50:02 +0000 Received: from BY1PR03MB1339.namprd03.prod.outlook.com (10.162.109.21) by BY1PR03MB1339.namprd03.prod.outlook.com (10.162.109.21) with Microsoft SMTP Server (TLS) id 15.1.213.14; Thu, 16 Jul 2015 07:49:46 +0000 Received: from BY1PR03MB1339.namprd03.prod.outlook.com ([10.162.109.21]) by BY1PR03MB1339.namprd03.prod.outlook.com ([10.162.109.21]) with mapi id 15.01.0213.000; Thu, 16 Jul 2015 07:49:46 +0000 From: Xuelin Shi To: Thomas Monjalon Thread-Topic: [PATCH v3] ixgbe: fix data access on big endian cpu Thread-Index: AQHQa4sLnIjQ9ACIrkSlHDCefxY1b51NOYUAgIgvOQCACPdccA== Date: Thu, 16 Jul 2015 07:49:44 +0000 Message-ID: References: <1427786750-30308-1-git-send-email-xuelin.shi@freescale.com> <2601191342CEEE43887BDE71AB97725821415A5B@irsmsx105.ger.corp.intel.com> <1774489.naxWROzf8E@xps13> In-Reply-To: <1774489.naxWROzf8E@xps13> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: 6wind.com; dkim=none (message not signed) header.d=none; x-originating-ip: [192.158.241.86] x-microsoft-exchange-diagnostics: 1; BY1PR03MB1339; 5:qLfd3K++EQCXYJCPBuBjia1V8SVarakAOpgXIOZV6KH9CUCr4hODgFrgDIY0m+y6c9t2AEaGgQ/lBuWOoIhZL7vL1pTXAPVOP8gkEkSzcRP0C3WhADaYQAZitWsQQ04ZoZDY0pYKieRKY48gILiFNQ==; 24:vSvzwShaJDY1+emzw3L2i8jArEyTGZ0Jr/Lu3g7yBpnGqCPjdFznHzne1QCRWARPqWDapDruW2Lm/68padqq/0sJR0Ou2yPpyy+lGBTi2OY=; 20:WV06HLau1sMFrpfyIQBdeCOrFK/U+gEkNHORnZ2TUV72x2NMJTHLA0VMa21jDptNSKhA8wtZQQlXGkJi8dAWog== x-microsoft-antispam: UriScan:; BCL:0; PCL:0; RULEID:; SRVR:BY1PR03MB1339; UriScan:; BCL:0; PCL:0; RULEID:; SRVR:BY1PR03MB1466; by1pr03mb1339: X-MS-Exchange-Organization-RulesExecuted x-microsoft-antispam-prvs: x-exchange-antispam-report-test: UriScan:; x-exchange-antispam-report-cfa-test: BCL:0; PCL:0; RULEID:(601004)(5005006)(3002001); SRVR:BY1PR03MB1339; BCL:0; PCL:0; RULEID:; SRVR:BY1PR03MB1339; x-forefront-prvs: 0639027A9E x-forefront-antispam-report: SFV:NSPM; SFS:(10019020)(6009001)(13464003)(377424004)(66066001)(50986999)(5001960100002)(110136002)(54356999)(76176999)(77156002)(122556002)(40100003)(106116001)(99286002)(189998001)(92566002)(15975445007)(2900100001)(33656002)(62966003)(76576001)(102836002)(2950100001)(46102003)(74316001)(19580405001)(87936001)(2656002)(19580395003)(86362001)(77096005)(5003600100002)(5001920100001)(5002640100001); DIR:OUT; SFP:1102; SCL:1; SRVR:BY1PR03MB1339; H:BY1PR03MB1339.namprd03.prod.outlook.com; FPR:; SPF:None; MLV:sfv; LANG:en; Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-MS-Exchange-CrossTenant-originalarrivaltime: 16 Jul 2015 07:49:44.5417 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 710a03f5-10f6-4d38-9ff4-a80b81da590d X-MS-Exchange-Transport-CrossTenantHeadersStamped: BY1PR03MB1339 X-Microsoft-Exchange-Diagnostics: 1; BY1PR03MB1466; 2:80COw3Ecc4ARHiXXhLZV2ylY2K2VRpiignXNHBUh2SElf/fGPfmu+ONSLd42OlqO; 3:vkiaqAnQj2hPi/S4JoRjv/6OedXjlvZemnSY+hlZ8T5qjpgJRp3HEWsYgwJpLrZM6yCexk/1t3PBgQePj3VAaan0aQQWW1MJopmyvaUGeuhkWjAw50WUlZ1seFP4CLX/bNBAM2GsSTMBvtGwLLUmsg==; 25:GrZ6gnxdPTY5jMwXrTB0yie3QDCyt3NT4PtmTgPMcJSHBzQFyYKoTfzKmdaUVmaTyOVtKqFDdZqQF6tIflaQiSxKIVS/DBHAbsggxqmmkCQUBelzW3H/T1OBZ+imobZ9b/y027zUmlaFJbWWt8OmFcgLrjOm0cMDXEhz8qraVb8g2uwWywiL8gMAl7KCNdwEpiFWX3OIXTIUWsrp3xWTaNkoniDpcELfmvaYo42GXTCfjjG14W4O28eJbLoIek5q6SyXVbDbEk1JdKJTLwSWkA== X-Microsoft-Exchange-Diagnostics: 1; BY1PR03MB1466; 20:eMsB469l/wpIRQ5Mxi6olQZ3pyhVjHK2Uk92MiCFRq6TqeUpchPkzQRy83/5slFHzKVrJL5EQhBNf00O42pSwPuL3+fC6P+h6CVPjH9OgirkS7Oo/B/qLtIzyJQ2K7DsgbJY+oRIB92FJcHTD23qloEc9xFzmF12eKwQRNQ/xKCvkF7b/o6b7ZV7i1/c68gcl+uMpibgeds+V24lvgHJqbRwRu0Fhw5CpYMC1atXSA0NIAiSAGFOO/3Qw3n31GaP6HAVfznzTLQHshAJZ+J36LqV7t5P312aVjzWGo2pvXaYx7Dp87qSP7tJQCYzvvWtOG/1bL9B6PvwDrDvrvwHysPxixW/98a5Pc2GXw8pnfJSUafTR381jqA1a/HhNhFD1Np4qrPjuGScwKEJBa0sIizcfR/WqotYn9WuGQEyVv9p7IYL8JU15deGwKA3aIPzCDOo7tPfpswi0lm+YhOlv0gNAKXIaR/t+1Fkql+s3QZXw85DVRI4ADhcB4NH/dBl; 23:qy6OTgxi9y7X0J8C68CDhNxA406jdMMKg5UIt1zWYhGOgtwxKrsFTKeB3IdLRDsZ3g/zE78xj9e6iPv0VrW+8adUsfcNzso9CKObd+fxWO6fZdeLw7ygsA89fOuQ9vaGTsmhvR5gwYM1WdF5N5OLMcpBKIDKHfopr7zN88MNsGu9sQL+gFOTb8cH3NMpqmNSxUaELpnOmyt2J4TgKJ84VZ+KvA1KoWrRtKQxw2K5BAshMZQec4EIvgIjMJunLH41 BY1PR03MB1466: X-MS-Exchange-Organization-RulesExecuted X-OriginatorOrg: freescale.com Cc: "dev@dpdk.org" Subject: Re: [dpdk-dev] [PATCH v3] ixgbe: fix data access on big endian cpu X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 16 Jul 2015 07:50:05 -0000 Hi Thomas, I have worked out the new version based on dpdk v2 codebase to address the = comments. http://www.dpdk.org/dev/patchwork/patch/6449/ thanks, Xuelin Shi > -----Original Message----- > From: Thomas Monjalon [mailto:thomas.monjalon@6wind.com] > Sent: Friday, July 10, 2015 22:52 > To: Shi Xuelin-B29237 > Cc: Ananyev, Konstantin; dev@dpdk.org > Subject: Re: [PATCH v3] ixgbe: fix data access on big endian cpu >=20 > Xuelin, have you given up with that patch? >=20 > 2015-04-14 23:11, Ananyev, Konstantin: > > From: xuelin.shi@freescale.com [mailto:xuelin.shi@freescale.com] > > > txd->read.olinfo_status =3D > > > - rte_cpu_to_le_32(olinfo_status); > > > + rte_cpu_to_le_32(olinfo_status); > > > + > > > > Not sure, what had changed here? >=20 > > > @@ -2293,7 +2314,8 @@ ixgbe_dev_rx_queue_count(struct rte_eth_dev > *dev, uint16_t rx_queue_id) > > > rxdp =3D &(rxq->rx_ring[rxq->rx_tail]); > > > > > > while ((desc < rxq->nb_rx_desc) && > > > - (rxdp->wb.upper.status_error & IXGBE_RXDADV_STAT_DD)) { > > > + (rte_le_to_cpu_32(rxdp->wb.upper.status_error) & > > > + IXGBE_RXDADV_STAT_DD)) { > > > > Why not ' rxdp->wb.upper.status_error & > rte_cpu_to_le_32(IXGBE_RXDADV_STAT_DD)'? > > To keep it consistent with rest of the changes? >=20 >=20