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Fri, 16 Oct 2020 08:54:58 +0000 From: "Ananyev, Konstantin" To: "Power, Ciara" , "dev@dpdk.org" CC: "viktorin@rehivetech.com" , "ruifeng.wang@arm.com" , "jerinj@marvell.com" , "drc@linux.vnet.ibm.com" , "Richardson, Bruce" , "david.marchand@redhat.com" Thread-Topic: [PATCH v8 18/18] acl: add checks for max SIMD bitwidth Thread-Index: AQHWo5RdP6wmPvWhcEuJzOpFhto9DamZ7DhA Date: Fri, 16 Oct 2020 08:54:58 +0000 Message-ID: References: <20200807155859.63888-1-ciara.power@intel.com> <20201016081320.186775-1-ciara.power@intel.com> <20201016081320.186775-19-ciara.power@intel.com> In-Reply-To: <20201016081320.186775-19-ciara.power@intel.com> Accept-Language: en-GB, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: dlp-product: dlpe-windows dlp-reaction: no-action dlp-version: 11.5.1.3 authentication-results: intel.com; dkim=none (message not signed) header.d=none;intel.com; dmarc=none action=none header.from=intel.com; x-originating-ip: [46.7.39.127] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: c3f89ee7-b000-4c30-d9f5-08d871b128fb x-ms-traffictypediagnostic: BY5PR11MB4418: x-ld-processed: 46c98d88-e344-4ed4-8496-4ed7712e255d,ExtAddr x-ms-exchange-transport-forked: True x-microsoft-antispam-prvs: x-ms-oob-tlc-oobclassifiers: OLM:5516; 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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: BYAPR11MB3301.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: c3f89ee7-b000-4c30-d9f5-08d871b128fb X-MS-Exchange-CrossTenant-originalarrivaltime: 16 Oct 2020 08:54:58.1900 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: l+ubl+Up/keMJ69Ew6n6J63rXfWbmnFoIUBgoeKKFWtuAxidyG30fLvShD34jxMSjqysfCdKrJxbHHMAijvYyNABZ2gDCKnjWNx7TCpFSbg= X-MS-Exchange-Transport-CrossTenantHeadersStamped: BY5PR11MB4418 X-OriginatorOrg: intel.com Subject: Re: [dpdk-dev] [PATCH v8 18/18] acl: add checks for max SIMD bitwidth X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" > When choosing a vector path to take, an extra condition must be > satisfied to ensure the max SIMD bitwidth allows for the CPU enabled > path. These checks are added in the check alg helper functions. >=20 > Cc: Konstantin Ananyev >=20 > Signed-off-by: Ciara Power >=20 > --- > v8: > - Added AVX512X32 into default options for get best alg function. > - Updated doc to reflect the above change. > v7: > - Removed global variable for max SIMD bitwidth. > - Added helper function for checking AVX512 cpu flags. > - Separated condition checking for the AVX512 algorithms to allow for > checking 256/512 max SIMD bitwidth, respectively. > - Added to docs to reflect the added changes in algorithm selection. > --- Acked-by: Konstantin Ananyev Tested-by: Konstantin Ananyev > 2.22.0