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Tue, 12 Jan 2021 16:09:59 +0000 From: "Ananyev, Konstantin" To: "Burakov, Anatoly" , "dev@dpdk.org" CC: Jan Viktorin , Ruifeng Wang , Jerin Jacob , David Christensen , Ray Kinsella , Neil Horman , "Richardson, Bruce" , "thomas@monjalon.net" , "McDaniel, Timothy" , "Hunt, David" , "Macnamara, Chris" Thread-Topic: [PATCH v15 01/11] eal: uninline power intrinsics Thread-Index: AQHW6CpTmXAftKdC80K94VtG8IyqVaokKbhQ Date: Tue, 12 Jan 2021 16:09:59 +0000 Message-ID: References: <18244c0453adf9a216f88e8edc14f1e68b53053b.1610377084.git.anatoly.burakov@intel.com> In-Reply-To: <18244c0453adf9a216f88e8edc14f1e68b53053b.1610377084.git.anatoly.burakov@intel.com> Accept-Language: en-GB, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: dlp-product: dlpe-windows dlp-reaction: no-action dlp-version: 11.5.1.3 authentication-results: intel.com; dkim=none (message not signed) header.d=none;intel.com; dmarc=none action=none header.from=intel.com; x-originating-ip: [46.7.39.127] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: 06c63368-da73-4601-725a-08d8b71482be x-ms-traffictypediagnostic: BYAPR11MB3112: x-ld-processed: 46c98d88-e344-4ed4-8496-4ed7712e255d,ExtAddr x-ms-exchange-transport-forked: True x-microsoft-antispam-prvs: x-ms-oob-tlc-oobclassifiers: OLM:5236; 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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: BYAPR11MB3301.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 06c63368-da73-4601-725a-08d8b71482be X-MS-Exchange-CrossTenant-originalarrivaltime: 12 Jan 2021 16:09:59.2474 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: 7loXj+PrtJrnRQCa82E8jAXIyKojVRtW1CSXaWQWBgGK5raLC/v34XP2XzfzRPSY7fu4lXLy34yIcq9Tuj50w8+OpyI/1gAgz8pACC+dr+0= X-MS-Exchange-Transport-CrossTenantHeadersStamped: BYAPR11MB3112 X-OriginatorOrg: intel.com Subject: Re: [dpdk-dev] [PATCH v15 01/11] eal: uninline power intrinsics X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Archived-At: List-Archive: > diff --git a/lib/librte_eal/x86/rte_power_intrinsics.c b/lib/librte_eal/x= 86/rte_power_intrinsics.c > new file mode 100644 > index 0000000000..34c5fd9c3e > --- /dev/null > +++ b/lib/librte_eal/x86/rte_power_intrinsics.c > @@ -0,0 +1,120 @@ > +/* SPDX-License-Identifier: BSD-3-Clause > + * Copyright(c) 2020 Intel Corporation > + */ > + > +#include "rte_power_intrinsics.h" > + > +static inline uint64_t > +__get_umwait_val(const volatile void *p, const uint8_t sz) > +{ > + switch (sz) { > + case sizeof(uint8_t): > + return *(const volatile uint8_t *)p; > + case sizeof(uint16_t): > + return *(const volatile uint16_t *)p; > + case sizeof(uint32_t): > + return *(const volatile uint32_t *)p; > + case sizeof(uint64_t): > + return *(const volatile uint64_t *)p; > + default: > + /* this is an intrinsic, so we can't have any error handling */ > + RTE_ASSERT(0); > + return 0; Nearly forgot - as now this function is not inline anymore, we can probably get rid of assert and return some error code instead? > + } > +} > +