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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: BYAPR12MB2824.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: bc6f9a66-782a-49dc-b22d-08d90577e0ff X-MS-Exchange-CrossTenant-originalarrivaltime: 22 Apr 2021 10:17:48.0768 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: 9cmu3nrkWf8kgOqUdEMltNdn5R9UsNoEvq7Wcy9RWrxSNOcFt4wdpvrriX/Df45B X-MS-Exchange-Transport-CrossTenantHeadersStamped: BY5PR12MB4115 Subject: Re: [dpdk-dev] [PATCH 3/3] net/mlx5: support checksum offload on Windows X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" > Subject: [PATCH 3/3] net/mlx5: support checksum offload on Windows >=20 > Support of the checksum offloading by checking the relevant FW capability > (csum_cap) for NIC support. >=20 > RX supported offloads: >=20 > DEV_RX_OFFLOAD_IPV4_CKSUM > DEV_RX_OFFLOAD_UDP_CKSUM > DEV_RX_OFFLOAD_TCP_CKSUM >=20 > TX supported offloads: >=20 > DEV_TX_OFFLOAD_IPV4_CKSUM > DEV_TX_OFFLOAD_UDP_CKSUM > DEV_TX_OFFLOAD_TCP_CKSUM >=20 > Signed-off-by: Tal Shnaiderman > Acked-by: Matan Azrad > --- > drivers/net/mlx5/windows/mlx5_os.c | 5 +++-- > 1 file changed, 3 insertions(+), 2 deletions(-) >=20 > diff --git a/drivers/net/mlx5/windows/mlx5_os.c > b/drivers/net/mlx5/windows/mlx5_os.c > index 5e53042b85..3fe3f55f49 100644 > --- a/drivers/net/mlx5/windows/mlx5_os.c > +++ b/drivers/net/mlx5/windows/mlx5_os.c > @@ -420,8 +420,6 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev, > err =3D mlx5_dev_check_sibling_config(priv, config); > if (err) > goto error; > - DRV_LOG(DEBUG, "checksum offloading is %ssupported", > - (config->hw_csum ? "" : "not ")); > DRV_LOG(DEBUG, "counters are not supported"); > config->ind_table_max_size =3D > sh->device_attr.max_rwq_indirection_table_size; > @@ -464,6 +462,9 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev, > sh->cmng.relaxed_ordering_read =3D > config->hca_attr.relaxed_ordering_read; > } > + config->hw_csum =3D config->hca_attr.csum_cap; > + DRV_LOG(DEBUG, "checksum offloading is %ssupported", > + (config->hw_csum ? "" : "not ")); > } > if (config->devx) { > uint32_t reg[MLX5_ST_SZ_DW(register_mtutc)]; > -- > 2.16.1.windows.4 Tested-by: Odi Assli