From: Raslan Darawsheh <rasland@nvidia.com>
To: Gregory Etelson <getelson@nvidia.com>, "dev@dpdk.org" <dev@dpdk.org>
Cc: Matan Azrad <matan@nvidia.com>, Raja Zidane <rzidane@nvidia.com>,
"stable@dpdk.org" <stable@dpdk.org>,
Slava Ovsiienko <viacheslavo@nvidia.com>
Subject: RE: [PATCH v4] net/mlx5: reject negative integrity item configuration
Date: Mon, 4 Jul 2022 16:23:29 +0000 [thread overview]
Message-ID: <BYAPR12MB30780C95A8F7DEFC7C3F16FECFBE9@BYAPR12MB3078.namprd12.prod.outlook.com> (raw)
In-Reply-To: <20220704101139.934-1-getelson@nvidia.com>
Hi,
> -----Original Message-----
> From: Gregory Etelson <getelson@nvidia.com>
> Sent: Monday, July 4, 2022 1:12 PM
> To: dev@dpdk.org
> Cc: Gregory Etelson <getelson@nvidia.com>; Matan Azrad
> <matan@nvidia.com>; Raslan Darawsheh <rasland@nvidia.com>; Raja
> Zidane <rzidane@nvidia.com>; stable@dpdk.org; Slava Ovsiienko
> <viacheslavo@nvidia.com>
> Subject: [PATCH v4] net/mlx5: reject negative integrity item configuration
>
> From: Raja Zidane <rzidane@nvidia.com>
>
> Negative integrity item refers to condition when the item value mask
> is set, but value spec is cleared:
> ... integrity value mask l4_ok value spec 0 ...
>
> RTE library defines integrity bits `l3_ok` and `l4_ok` as accumulators
> for all hardware L3 and L4 integrity verifications respectfully.
> Hardware `l3_ok` and `l4_ok` integrity bits refer to L3 and L4
> network headers only.
> Integrity bits `l3_ok` and `l4_ok` are not compatible between RTE
> library and hardware.
>
> PMD translations for RTE `l3_ok` are:
> IPv4: `l3_ok` and `l3_csum_ok`
> IPv6: `l3_ok`
> RTE `l4_ok` is translated into PMD `l4_ok` and `l4_csum_ok` bits.
>
> Positive IPv4 `l3_ok` flow item configuration is translated into
> a single matcher that AND corresponding hardware bits.
> Negative IPv4 `l3_ok` is translated into 2 hardware conditions where
> each condition probes a single integrity bit:
> RTE::l3_ok is 0 => MLX5::l3_ok is 0 OR MLX5:l3_csum_ok is 0
> MLX5 hardware does not do OR condition in flow rule item.
> Negative IPv4 `l3_ok` must be translated into 2 flow rules.
> Similarly negative RTE `l4_ok` condition is also translated into 2
> hardware rules.
>
> Current PMD roadmap does not allow implicit flow rule split.
>
> TODO: extend RTE integrity bits definition to allow match on each
> hardware integrity bit for accumulated integiry matches.
>
> Bugzilla ID: 948
>
> cc: stable@dpdk.org
>
> Proposed-off-by: Raja Zidane rzidane@nvidia.com
> Signed-off-by: Gregory Etelson <getelson@nvidia.com>
> Acked-by: Matan Azrad <matan@nvidia.com>
> Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
Patch applied to next-net-mlx,
Kindest regards,
Raslan Darawsheh
prev parent reply other threads:[~2022-07-04 16:23 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-07-03 8:02 [PATCH] " Gregory Etelson
2022-07-03 8:08 ` [PATCH v2] " Gregory Etelson
2022-07-04 10:11 ` [PATCH v4] " Gregory Etelson
2022-07-04 16:23 ` Raslan Darawsheh [this message]
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