From: Raslan Darawsheh <rasland@nvidia.com>
To: Gregory Etelson <getelson@nvidia.com>, "dev@dpdk.org" <dev@dpdk.org>
Cc: Matan Azrad <matan@nvidia.com>,
"stable@dpdk.org" <stable@dpdk.org>,
Slava Ovsiienko <viacheslavo@nvidia.com>
Subject: RE: [PATCH] common/mlx5: fix DevX register read error severity
Date: Thu, 10 Nov 2022 17:17:53 +0000 [thread overview]
Message-ID: <BYAPR12MB3078490ED6144C7A54694C8CCF019@BYAPR12MB3078.namprd12.prod.outlook.com> (raw)
In-Reply-To: <20221110130520.15275-1-getelson@nvidia.com>
Hi,
> -----Original Message-----
> From: Gregory Etelson <getelson@nvidia.com>
> Sent: Thursday, November 10, 2022 3:05 PM
> To: dev@dpdk.org
> Cc: Gregory Etelson <getelson@nvidia.com>; Matan Azrad
> <matan@nvidia.com>; Raslan Darawsheh <rasland@nvidia.com>;
> stable@dpdk.org; Slava Ovsiienko <viacheslavo@nvidia.com>
> Subject: [PATCH] common/mlx5: fix DevX register read error severity
>
> PMD attempt to read HW UTC counter properties can fail because the
> feature
> has no support in port FW or mlx5 kernel module.
>
> In that case PMD still can produce correct time-stamps if it runs on core with
> nanosecond time resolution.
>
> Fixes: b0067860959d ("common/mlx5: update log for DevX general command
> failure")
> removed extra blank line
> Cc: stable@dpdk.org
>
added reported-by tag
> Signed-off-by: Gregory Etelson <getelson@nvidia.com>
> Acked-by: Matan Azrad <matan@nvidia.com>
Patch applied to next-net-mlx,
Kindest regards,
Raslan Darawsheh
prev parent reply other threads:[~2022-11-10 17:17 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-11-10 13:05 Gregory Etelson
2022-11-10 16:18 ` David Marchand
2022-11-10 17:17 ` Raslan Darawsheh [this message]
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