From: Raslan Darawsheh <rasland@nvidia.com>
To: Slava Ovsiienko <viacheslavo@nvidia.com>, "dev@dpdk.org" <dev@dpdk.org>
Cc: Matan Azrad <matan@nvidia.com>,
Dmitry Kozlyuk <dkozlyuk@nvidia.com>,
"stable@dpdk.org" <stable@dpdk.org>
Subject: RE: [PATCH] net/mlx5: fix the inline length exceeding descriptor limit
Date: Thu, 18 Aug 2022 11:07:48 +0000 [thread overview]
Message-ID: <BYAPR12MB3078695E134987843C93B764CF6D9@BYAPR12MB3078.namprd12.prod.outlook.com> (raw)
In-Reply-To: <20220817141357.7386-1-viacheslavo@nvidia.com>
Hi,
> -----Original Message-----
> From: Slava Ovsiienko <viacheslavo@nvidia.com>
> Sent: Wednesday, August 17, 2022 5:14 PM
> To: dev@dpdk.org
> Cc: Matan Azrad <matan@nvidia.com>; Raslan Darawsheh
> <rasland@nvidia.com>; Dmitry Kozlyuk <dkozlyuk@nvidia.com>;
> stable@dpdk.org
> Subject: [PATCH] net/mlx5: fix the inline length exceeding descriptor limit
>
> The hardware descriptor (WQE) length field is 6 bits wide
> and we have the native limitation for the overall descriptor
> length. To improve the PCIe bandwidth the packet data can be
> inline into descriptor. If PMD was configured to inline large
> amount of data it happened there was no enough space remaining
> in the descriptor to specify all the packet data segments and
> PMD rejected problematic packets.
>
> The patch tries to adjust the inline data length conservatively
> and allows to avoid error occurring.
>
> Fixes: 18a1c20044c0 ("net/mlx5: implement Tx burst template")
> Fixes: e2259f93ef45 ("net/mlx5: fix Tx when inlining is impossible")
> Cc: stable@dpdk.org
>
> Signed-off-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
> Reviewed-by: Dmitry Kozlyuk <dkozlyuk@nvidia.com>
Patch applied to next-net-mlx,
Kindest regards,
Raslan Darawsheh
prev parent reply other threads:[~2022-08-18 11:07 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-08-17 14:13 Viacheslav Ovsiienko
2022-08-18 11:07 ` Raslan Darawsheh [this message]
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