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Tue, 6 Nov 2018 21:30:13 +0000 From: Yongseok Koh To: "Wiles, Keith" CC: Thomas Monjalon , "Richardson, Bruce" , "Yigit, Ferruh" , "dev@dpdk.org" , Shahaf Shuler , "Ananyev, Konstantin" , "Burakov, Anatoly" , "stable@dpdk.org" Thread-Topic: [dpdk-dev] [PATCH v2] build: disable compiler AVX512F support Thread-Index: AQHUcu+WK09O3nLQfUKZoE958YxG+aVBO6uAgAIOQgA= Date: Tue, 6 Nov 2018 21:30:13 +0000 Message-ID: References: <20181023212318.43082-1-yskoh@mellanox.com> <20181102210348.28148-1-yskoh@mellanox.com> <7879265D-9280-47ED-8987-A332C0A3DBF9@intel.com> In-Reply-To: <7879265D-9280-47ED-8987-A332C0A3DBF9@intel.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: spf=none (sender IP is ) smtp.mailfrom=yskoh@mellanox.com; x-originating-ip: [209.116.155.178] x-ms-publictraffictype: Email x-microsoft-exchange-diagnostics: 1; DB3PR0502MB3995; 6:Q/JYftYJyDMxqb/rfgVm9Wt/rJRXGwNXQe0CG2kGT2nGz0blSosVqv7haoqfU7SSJUOuMwB74D+YVhEW2qKVohfFbZv7Q5G+XJn6rE9rt58OflnjQkwjAGxacjBtKSFLtiZ/81iZC8kLqCkF81oANN/KkSPkgvPJmWnJYUbm76raHdb2tG6orm1dJvK9FVJPEB1cL9YB6gcltugIE9l0jr16fPQYPaiu46uhhvQsz2TOLLydFPG7nUWZEg8rEsK7D639DP7+N2RCpkH+jNITdOKEUZbDlJ2yipqBZEhkSmMH2WGsRN6HWbklbWqK+XUksvluADyQyOKKKVfDigQ6ebVB4qcwMc3RVGxu6sXKhE0bXFppgwrwQkWkbTHJ5V6SeY0xdw61E8pbmWJvDOo9QUr7NRrct6SXnDobywcD9GKpui5kP3g6iC7cXZ3SK2VcNKde7xaxxPxhkvSEa0/vdA==; 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charset="us-ascii" Content-ID: Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: Mellanox.com X-MS-Exchange-CrossTenant-Network-Message-Id: a25b7878-0e99-4142-7fa5-08d6442f0962 X-MS-Exchange-CrossTenant-originalarrivaltime: 06 Nov 2018 21:30:13.0011 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: a652971c-7d2e-4d9b-a6a4-d149256f461b X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB3PR0502MB3995 Subject: Re: [dpdk-dev] [PATCH v2] build: disable compiler AVX512F support X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 06 Nov 2018 21:30:15 -0000 > On Nov 5, 2018, at 6:06 AM, Wiles, Keith wrote: >=20 >=20 >=20 >> On Nov 2, 2018, at 9:04 PM, Yongseok Koh wrote: >>=20 >> This is a workaround to prevent a crash, which might be caused by >> optimization of newer gcc (7.3.0) on Intel Skylake. >=20 > Should the code below not also test for the gcc version and the Sky Lake = processor, maybe I am wrong but it seems it is turning AVX512 for all GCC b= uilds I didn't want to check gcc version as 7.3.0 is very new. Only gcc 8 is newl= y up since then (gcc 8.2). Also, I wasn't able to test every gcc versions and I wanted to be a bit con= servative for this crash. Performance drop (if any) by disabling a new (experimental) feature would b= e less risky than unaccountable crash. And, it does disable the feature only if CONFIG_RTE_ENABLE_AVX512=3Dn. Plea= se refer to v3. >=20 > Also bug 97 seems a bit obscure reference, maybe you know the bug report,= but more details would be good? I sent out the report to dev list two month ago. And I created the Bug 97 i= n order to reference it in the commit message. I didn't want to repeat same message here and there, but it would've been b= etter to have some sort of summary of the Bug, although v3 has a few more w= ords. However, v3 has been merged. Thanks, Yongseok >>=20 >> Bugzilla ID: 97 >>=20 >> Cc: stable@dpdk.org >>=20 >> Signed-off-by: Yongseok Koh >> --- >>=20 >> v2: >> * disable the flag only in case of gcc >>=20 >> config/x86/meson.build | 5 +++++ >> mk/rte.cpuflags.mk | 7 +++++++ >> 2 files changed, 12 insertions(+) >>=20 >> diff --git a/config/x86/meson.build b/config/x86/meson.build >> index 33efb5e547..8ddca0ea9f 100644 >> --- a/config/x86/meson.build >> +++ b/config/x86/meson.build >> @@ -47,6 +47,11 @@ endif >> if cc.get_define('__AVX512F__', args: march_opt) !=3D '' >> dpdk_conf.set('RTE_MACHINE_CPUFLAG_AVX512F', 1) >> compile_time_cpuflags +=3D ['RTE_CPUFLAG_AVX512F'] >> +else >> +# disable AVX512F support of gcc as a workaround for Bug 97 >> + if cc.get_id() =3D=3D 'gcc' and cc.has_argument('-mavx512f') >> + machine_args +=3D '-mno-avx512f' >> + endif >> endif >>=20 >> dpdk_conf.set('RTE_CACHE_LINE_SIZE', 64) >> diff --git a/mk/rte.cpuflags.mk b/mk/rte.cpuflags.mk >> index 43ed84155b..a8c26fb011 100644 >> --- a/mk/rte.cpuflags.mk >> +++ b/mk/rte.cpuflags.mk >> @@ -68,6 +68,13 @@ endif >> ifneq ($(filter $(AUTO_CPUFLAGS),__AVX512F__),) >> ifeq ($(CONFIG_RTE_ENABLE_AVX512),y) >> CPUFLAGS +=3D AVX512F >> +else >> +# disable AVX512F support of gcc as a workaround for Bug 97 >> +ifeq ($(CONFIG_RTE_TOOLCHAIN_GCC),y) >> + ifeq ($(shell $(CC) --target-help | grep -q mavx512f && echo 1), 1) >> + MACHINE_CFLAGS +=3D -mno-avx512f >> + endif >> +endif >> endif >> endif >>=20 >> --=20 >> 2.11.0 >>=20 >=20 > Regards, > Keith