From: Alexander Belyakov <abelyako@gmail.com>
To: 吴亚东 <wuyd@outlook.com>
Cc: "dev@dpdk.org" <dev@dpdk.org>
Subject: Re: [dpdk-dev] DPDK testpmd forwarding performace degradation
Date: Tue, 27 Jan 2015 11:04:26 +0300 [thread overview]
Message-ID: <CAAQJX_SksjCZxgg0vqhLEuqc8OiSPKxJMZuRk6_-uEW6OF8v1Q@mail.gmail.com> (raw)
In-Reply-To: <BAY176-W12D96351C9C7B97C488C96C3320@phx.gbl>
Hello,
On Tue, Jan 27, 2015 at 5:49 AM, 吴亚东 <wuyd@outlook.com> wrote:
> 65 bytes frame may degrade performace a lot.Thats related to DMA and cache.
> When NIC dma packets to memory, NIC has to do read modify write if DMA
> size is partial cache line.So for 65 bytes, the first 64 bytes are ok. The
> next 1 byte NIC has to read the whole cache line, change one byte and
> update the cache line.
> So in DPDK, CRC is not stripped and ethernet header aligned to cache line
> which causes ip header not aligned on 4 bytes.
>
>
Extra cache line update indeed makes sense because performance is halved
with extra byte.
It is a little bit confusing, but the issue is not with switching from 64
bytes frames to 65 bytes frames, but with switching from 80 bytes frame to
81 bytes frame. Note that the issue disappears at 96 bytes frame size.
Alexander
next prev parent reply other threads:[~2015-01-27 8:04 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-01-27 2:49 吴亚东
2015-01-27 8:04 ` Alexander Belyakov [this message]
-- strict thread matches above, loose matches on Subject: below --
2015-01-26 10:17 Alexander Belyakov
2015-01-26 14:22 ` De Lara Guarch, Pablo
[not found] ` <CAAQJX_RueTvfr7UnANbLSKceerkfs5DZNguKdPhSVVn9OCGtrw@mail.gmail.com>
2015-01-27 7:51 ` [dpdk-dev] Fwd: " Alexander Belyakov
2015-01-27 10:14 ` [dpdk-dev] " Alexander Belyakov
2015-01-27 16:21 ` De Lara Guarch, Pablo
2015-01-28 12:24 ` Alexander Belyakov
2015-01-29 12:43 ` Alexander Belyakov
2015-02-05 14:39 ` Alexander Belyakov
2015-01-26 17:08 ` Stephen Hemminger
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