From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-qc0-f171.google.com (mail-qc0-f171.google.com [209.85.216.171]) by dpdk.org (Postfix) with ESMTP id 802415B3B for ; Tue, 27 Jan 2015 09:04:28 +0100 (CET) Received: by mail-qc0-f171.google.com with SMTP id s11so10931127qcv.2 for ; Tue, 27 Jan 2015 00:04:27 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=mime-version:in-reply-to:references:date:message-id:subject:from:to :cc:content-type; bh=+dxeAMuX33lTcVjdqN+yljrGK7VWJdBmoVz8/+Duk1w=; b=bl7vMNUAHg5JSNYbF88L5+zI+K6p469r0Y7Dhkj2h1746stdAPOITeTBMwCjRiUcip d4x+mjhqSJHLbpVCsztFv/Birgt2/KHXTCT8VQ+Y7hvs8nfMHRCkD+EKBPt8uiCWMbSL TNHii+rvCWGhqxY5q0HPJ6vNH5IAa94K3k6lpESBTx+S8Tk9RHT1p1tt3ok4ziA3BlTU 2QEShs9Pi+bpOfQ95tkOuGotnu2IvUGkOVZI41VlckNZIx0Ox7UV41LYLKVPFUEyBH1L 63BeDVTHeCsjVDF9QfcM7ibaU12VJVPURtgT3bqh3sexIbpS48zmJe96VGyDZo0EWEcG lZpg== MIME-Version: 1.0 X-Received: by 10.229.64.67 with SMTP id d3mr44682qci.9.1422345866938; Tue, 27 Jan 2015 00:04:26 -0800 (PST) Received: by 10.140.93.51 with HTTP; Tue, 27 Jan 2015 00:04:26 -0800 (PST) In-Reply-To: References: Date: Tue, 27 Jan 2015 11:04:26 +0300 Message-ID: From: Alexander Belyakov To: =?UTF-8?B?5ZC05Lqa5Lic?= Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-Content-Filtered-By: Mailman/MimeDel 2.1.15 Cc: "dev@dpdk.org" Subject: Re: [dpdk-dev] DPDK testpmd forwarding performace degradation X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 27 Jan 2015 08:04:29 -0000 Hello, On Tue, Jan 27, 2015 at 5:49 AM, =E5=90=B4=E4=BA=9A=E4=B8=9C wrote: > 65 bytes frame may degrade performace a lot.Thats related to DMA and cach= e. > When NIC dma packets to memory, NIC has to do read modify write if DMA > size is partial cache line.So for 65 bytes, the first 64 bytes are ok. Th= e > next 1 byte NIC has to read the whole cache line, change one byte and > update the cache line. > So in DPDK, CRC is not stripped and ethernet header aligned to cache line > which causes ip header not aligned on 4 bytes. > > Extra cache line update indeed makes sense because performance is halved with extra byte. It is a little bit confusing, but the issue is not with switching from 64 bytes frames to 65 bytes frames, but with switching from 80 bytes frame to 81 bytes frame. Note that the issue disappears at 96 bytes frame size. Alexander