From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-wm0-f67.google.com (mail-wm0-f67.google.com [74.125.82.67]) by dpdk.org (Postfix) with ESMTP id D7B931B2BD for ; Mon, 6 Nov 2017 14:42:49 +0100 (CET) Received: by mail-wm0-f67.google.com with SMTP id r196so13889105wmf.2 for ; Mon, 06 Nov 2017 05:42:49 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:from:date:message-id:subject:to:cc; bh=5rU3uBQsAdyfBta33mxiyuSxUqUQkyIaNM9oNdNjzW4=; b=TQgagCB3EqBON44IhQWgIHckbcCB6VUZqkZfo4UW1Qa5dTa61piw0sbRn64hh3aqPF KMa9W6qGPqbGMiP9PFCKc78hqwvDd/dl5aO0UTnANYMgVrj1A24UBAB/o2MUsD1F0jpF CMWqHIHct1+Y9MUYyFl7Vff1R76DIk+AjSJdvrapTHoqBTGtRZJQxQljePn8eXnVQBSA Y0QV8vROtG1nLG4hC/HpD0qzyDlMwAxYkK0w4a2EiiOfF08irzl5oYBENr8xn9bvZfj9 D8f9pAR/0XUzRCDh+CI/BsEfeZYcm3n9++dWkT4EuaXIF4LRMFx57VfEIKqS+7yR5UpJ 3IKw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:from:date:message-id:subject:to:cc; bh=5rU3uBQsAdyfBta33mxiyuSxUqUQkyIaNM9oNdNjzW4=; b=f4fUUUhu7VpuHDBsuIshwzGQAX6W85pOW1KytBrQgyoaJ0o1uBdNJc7XuXrzq4PA1j 47mWf2OzIJYI/Y+xO8nNIGQ34oKquf6a3GNrdpfhWPPNStq8Qztglh9oByDUc13aBatP WHPUS5ZYCw6R6qw0ww9X60G5pZB0nraE6yxuYn+wVo69Zjp1zZYCXKLo35EaS/3fBcjV NAIVaUu4FWAU8PMMmTm+U/fPQiLDA+PiPp4vsMPeHOz/e04C4nxqrbSYIDOjqqcf8YH6 Vdlj/CGk0TplSMdbJLxd+pc6flTRUer2GW4ChDYzbz1t/zoj7vmcLcESciggzX0aRdVZ 8vUg== X-Gm-Message-State: AJaThX4b/cVJ4bav0uW4LXgcccJTNL6rMjzttlMC9mc8iLcxosJn++m8 71hx7+qekbdctYkIXz5v3i0yKlgNE6q6qOeFu+64SoTt X-Google-Smtp-Source: ABhQp+Qftkw9bvui0xELwjC9sWbAJjDu5xiNCCxuyXateQcUnRn3UMtQvoZfLIAkDUprh4gC6ulglswEVN1+Nc/u0ck= X-Received: by 10.28.135.205 with SMTP id j196mr5264892wmd.144.1509975769278; Mon, 06 Nov 2017 05:42:49 -0800 (PST) MIME-Version: 1.0 Received: by 10.223.165.85 with HTTP; Mon, 6 Nov 2017 05:42:48 -0800 (PST) From: Shweta Choudaha Date: Mon, 6 Nov 2017 13:42:48 +0000 Message-ID: To: dev@dpdk.org Cc: bluca@debian.org Content-Type: text/plain; charset="UTF-8" X-Content-Filtered-By: Mailman/MimeDel 2.1.15 Subject: [dpdk-dev] [PATCH 1/2] net/ixgbe: add and export MDIO APIs X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 06 Nov 2017 13:42:50 -0000 Add ixgbe MDIO access APIs to read and write PHY registers when being used as a backplane port. Export these APIs via the map file Signed-off-by: Shweta Choudaha Reviewed-by: Chas Williams Reviewed-by: Luca Boccassi --- drivers/net/ixgbe/rte_pmd_ixgbe.c | 53 +++++++++++++++++++++++++++++ drivers/net/ixgbe/rte_pmd_ixgbe.h | 39 +++++++++++++++++++++ drivers/net/ixgbe/rte_pmd_ixgbe_version.map | 7 ++++ 3 files changed, 99 insertions(+) diff --git a/drivers/net/ixgbe/rte_pmd_ixgbe.c b/drivers/net/ixgbe/rte_pmd_ixgbe.c index f127378..34d8cb4 100644 --- a/drivers/net/ixgbe/rte_pmd_ixgbe.c +++ b/drivers/net/ixgbe/rte_pmd_ixgbe.c @@ -1041,3 +1041,56 @@ rte_pmd_ixgbe_bypass_wd_reset(uint16_t port_id) return ixgbe_bypass_wd_reset(dev); } #endif + +static void rte_pmd_ixgbe_get_hw_phy(uint16_t port, struct ixgbe_hw **hw, + struct ixgbe_phy_info **phy) +{ + struct rte_eth_dev *dev; + + *hw = NULL; + *phy = NULL; + + dev = &rte_eth_devices[port]; + if (!is_ixgbe_supported(dev)) + return; + + *hw = IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private); + if (!*hw) + return; + + *phy = &(*hw)->phy; +} + +int +rte_pmd_ixgbe_mdio_read(uint16_t port, uint32_t reg_addr, + uint32_t dev_type, uint16_t *phy_data) +{ + struct ixgbe_hw *hw; + struct ixgbe_phy_info *phy; + + RTE_ETH_VALID_PORTID_OR_ERR_RET(port, -ENODEV); + + rte_pmd_ixgbe_get_hw_phy(port, &hw, &phy); + + if (!hw || !phy) + return -ENOTSUP; + + return phy->ops.read_reg_mdi(hw, reg_addr, dev_type, phy_data); +} + +int +rte_pmd_ixgbe_mdio_write(uint16_t port, uint32_t reg_addr, + uint32_t dev_type, uint16_t phy_data) +{ + struct ixgbe_hw *hw; + struct ixgbe_phy_info *phy; + + RTE_ETH_VALID_PORTID_OR_ERR_RET(port, -ENODEV); + + rte_pmd_ixgbe_get_hw_phy(port, &hw, &phy); + + if (!hw || !phy) + return -ENOTSUP; + + return phy->ops.write_reg_mdi(hw, reg_addr, dev_type, phy_data); +} diff --git a/drivers/net/ixgbe/rte_pmd_ixgbe.h b/drivers/net/ixgbe/rte_pmd_ixgbe.h index 81b18f8..5d36f8a 100644 --- a/drivers/net/ixgbe/rte_pmd_ixgbe.h +++ b/drivers/net/ixgbe/rte_pmd_ixgbe.h @@ -601,6 +601,45 @@ int rte_pmd_ixgbe_bypass_wd_timeout_show(uint16_t port, uint32_t *wd_timeout); */ int rte_pmd_ixgbe_bypass_wd_reset(uint16_t port); +/** + * Read PHY register using MDIO + * + * @param port + * The port identifier of the Ethernet device. + * @param reg_addr + * 32 bit PHY Register + * @param dev_type + * Always Unused + * @param phy_data + * Pointer for reading PHY register data + * @return + * - (0) if successful. + * - (-ENOTSUP) if hardware doesn't support. + * - (-ENODEV) if *port* invalid. + */ +int +rte_pmd_ixgbe_mdio_read(uint16_t port, uint32_t reg_addr, + uint32_t dev_type, uint16_t *phy_data); + +/** + * Write data to PHY register using MDIO + * + * @param port + * The port identifier of the Ethernet device. + * @param reg_addr + * 32 bit PHY Register + * @param dev_type + * Always unused + * @param phy_data + * Data to write to PHY register + * @return + * - (0) if successful. + * - (-ENOTSUP) if hardware doesn't support. + * - (-ENODEV) if *port* invalid. + */ +int +rte_pmd_ixgbe_mdio_write(uint16_t port, uint32_t reg_addr, + uint32_t dev_type, uint16_t phy_data); /** * Response sent back to ixgbe driver from user app after callback diff --git a/drivers/net/ixgbe/rte_pmd_ixgbe_version.map b/drivers/net/ixgbe/rte_pmd_ixgbe_version.map index bf77674..b4d5983 100644 --- a/drivers/net/ixgbe/rte_pmd_ixgbe_version.map +++ b/drivers/net/ixgbe/rte_pmd_ixgbe_version.map @@ -52,3 +52,10 @@ DPDK_17.08 { rte_pmd_ixgbe_bypass_wd_timeout_show; rte_pmd_ixgbe_bypass_wd_timeout_store; } DPDK_17.05; + +EXPERIMENTAL { + global: + + rte_pmd_ixgbe_mdio_read; + rte_pmd_ixgbe_mdio_write; +} DPDK_17.11; -- 2.1.4