From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-pf0-f169.google.com (mail-pf0-f169.google.com [209.85.192.169]) by dpdk.org (Postfix) with ESMTP id DDCB8F72 for ; Mon, 8 Feb 2016 06:56:39 +0100 (CET) Received: by mail-pf0-f169.google.com with SMTP id o185so104182170pfb.1 for ; Sun, 07 Feb 2016 21:56:39 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=mvista-com.20150623.gappssmtp.com; s=20150623; h=mime-version:in-reply-to:references:date:message-id:subject:from:to :cc:content-type; bh=HnGfqwZ4TRfhAAhqG/Qgw096plhGFgO5QqOtsJGlRz0=; b=A24sxwVN2Sexc6h26bPJLSohTrRWA9Q0AXzcANkSFPI+Hn6zJHEWN9K+6bTWct6BX3 sJ/INNNWPrqOy9V2wB6172fz56LlhWvyusZJf8YP8lV4dIefIls8yI/T+z8X0WRfiIR2 fnTEgD+rEzgz9zJGYF+VAcJESUdRVG/hARdw0GcVJiSsvw2QR5LySFgdo8rnuxmjkgZy oR7nYqD4T1UNV35mBN4yUjXkWtbza0KLFZ3M3G3am3iDsPa6qh9mb6xJjaprXIUWW57u 9Mo604810UZ+lVyG3Ei42BLwrBGa8cq6OiRAAyoH+kgLds1SV9FLFLNFmAr3zjAICGB9 6JRA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:in-reply-to:references:date :message-id:subject:from:to:cc:content-type; bh=HnGfqwZ4TRfhAAhqG/Qgw096plhGFgO5QqOtsJGlRz0=; b=enVi7hM0wLQ64BI494qpwnZIFGEZnSLwOkPpaj7U5svsotSgsB7Zq50vtZg/ZLiDg3 kKksyUHcyL0ji/nrOBk4gYKPTuERcIJELpDKTNIBpUkVolbN9M6xQ02aKqgL5ErXsNvg 8ZOo/O9z6/HIasm9ifwNUSAm0XvOFAzMWEEdfgS9x8HBxyStpAGVaD0bio3HCo+pdeZQ +5BvbRmQVS5HgpEiSF8xyLtDayaibmwULHBFrhSgvhplq/Dnc59f4bv4J5Zp/NR/XZDd rCJd7zm3p5wexgBVwDOLYnV6ElUTuymSWcVMUkJZM2VimKWP7ZLosO5fHJBVsun2w4zN aKRg== X-Gm-Message-State: AG10YOQvFhla3paniPgZheRCKkrsmAOrUDzB8QT6mfyQ8mWHwqdHuWD/wtL/alxDNv2lGQ17635r9T0DYazpzN8R MIME-Version: 1.0 X-Received: by 10.98.8.74 with SMTP id c71mr40457928pfd.155.1454910999272; Sun, 07 Feb 2016 21:56:39 -0800 (PST) Received: by 10.66.12.132 with HTTP; Sun, 7 Feb 2016 21:56:39 -0800 (PST) In-Reply-To: <1454831317-4542-4-git-send-email-david.marchand@6wind.com> References: <1454694945-18040-1-git-send-email-david.marchand@6wind.com> <1454831317-4542-1-git-send-email-david.marchand@6wind.com> <1454831317-4542-4-git-send-email-david.marchand@6wind.com> Date: Mon, 8 Feb 2016 11:26:39 +0530 Message-ID: From: Santosh Shukla To: David Marchand Content-Type: text/plain; charset=UTF-8 Cc: dev@dpdk.org Subject: Re: [dpdk-dev] [PATCH v2 3/4] eal: introduce pci ioport api X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 08 Feb 2016 05:56:40 -0000 On Sun, Feb 7, 2016 at 1:18 PM, David Marchand wrote: > Most of the code is inspired on virtio driver. > rte_pci_ioport structure is filled at map time with anything needed for later > read / write calls. > At the moment, offset field is used to store a x86 ioport (uint16_t) and will > be reused for other arches. > > TODO: check multi process, check intr_handle init/exit, > > Signed-off-by: David Marchand > --- > Changes since v1: > - dropped rte_ioport and removed the arch headers, if performance is an > issue, we will see how to enhance this in later patches > - rte_pci_ioport object now reaches driver implementation (uio / vfio) > - sanity checks are in uio map function, no reason to have those checks in > read/write functions > Looks okay to me. Reviewed-by: Santosh Shukla Tested for arm64/x86_64 for vfio mode...so.. Tested-by: Santosh Shukla > --- > lib/librte_eal/bsdapp/eal/eal_pci.c | 135 +++++++++++++++++++ > lib/librte_eal/bsdapp/eal/rte_eal_version.map | 4 + > lib/librte_eal/common/include/rte_pci.h | 67 ++++++++++ > lib/librte_eal/linuxapp/eal/eal_pci.c | 170 ++++++++++++++++++++++++ > lib/librte_eal/linuxapp/eal/eal_pci_init.h | 16 +++ > lib/librte_eal/linuxapp/eal/eal_pci_uio.c | 132 +++++++++++++++++- > lib/librte_eal/linuxapp/eal/eal_pci_vfio.c | 37 ++++++ > lib/librte_eal/linuxapp/eal/rte_eal_version.map | 4 + > 8 files changed, 562 insertions(+), 3 deletions(-) > > diff --git a/lib/librte_eal/bsdapp/eal/eal_pci.c b/lib/librte_eal/bsdapp/eal/eal_pci.c > index 95c32c1..bda6d78 100644 > --- a/lib/librte_eal/bsdapp/eal/eal_pci.c > +++ b/lib/librte_eal/bsdapp/eal/eal_pci.c > @@ -51,6 +51,11 @@ > #include > #include > > +#if defined(RTE_ARCH_X86_64) || defined(RTE_ARCH_I686) > +#include > +#include > +#endif > + > #include > #include > #include > @@ -479,6 +484,136 @@ int rte_eal_pci_write_config(const struct rte_pci_device *dev, > return -1; > } > > +int > +rte_eal_pci_ioport_map(struct rte_pci_device *dev, int bar, > + struct rte_pci_ioport *p) > +{ > + int ret; > + > + switch (dev->kdrv) { > +#if defined(RTE_ARCH_X86_64) || defined(RTE_ARCH_I686) > + case RTE_KDRV_NIC_UIO: > + if (dev->mem_resource[bar].addr <= UINT16_MAX) { > + p->offset = dev->mem_resource[bar].addr; > + ret = 0; > + } else > + ret = -1; > + break; > +#endif > + default: > + ret = -1; > + break; > + } > + > + if (!ret) > + p->dev = dev; > + > + return ret; > +} > + > +static void > +pci_uio_ioport_read(struct rte_pci_ioport *p, > + void *data, size_t len, off_t offset) > +{ > +#if defined(RTE_ARCH_X86_64) || defined(RTE_ARCH_I686) > + uint8_t *d; > + int size; > + unsigned short reg = p->offset + offset; > + > + for (d = data; len > 0; d += size, reg += size, len -= size) { > + if (len >= 4) { > + size = 4; > + *(uint32_t *)d = inl(reg); > + } else if (len >= 2) { > + size = 2; > + *(uint16_t *)d = inw(reg); > + } else { > + size = 1; > + *d = inb(reg); > + } > + } > +#else > + RTE_SET_USED(p); > + RTE_SET_USED(data); > + RTE_SET_USED(len); > + RTE_SET_USED(offset); > +#endif > +} > + > +void > +rte_eal_pci_ioport_read(struct rte_pci_ioport *p, > + void *data, size_t len, off_t offset) > +{ > + switch (p->dev->kdrv) { > + case RTE_KDRV_NIC_UIO: > + pci_uio_ioport_read(p, data, len, offset); > + break; > + default: > + break; > + } > +} > + > +static void > +pci_uio_ioport_write(struct rte_pci_ioport *p, > + const void *data, size_t len, off_t offset) > +{ > +#if defined(RTE_ARCH_X86_64) || defined(RTE_ARCH_I686) > + const uint8_t *s; > + int size; > + unsigned short reg = p->offset + offset; > + > + for (s = data; len > 0; s += size, reg += size, len -= size) { > + if (len >= 4) { > + size = 4; > + outl(*(const uint32_t *)s, reg); > + } else if (len >= 2) { > + size = 2; > + outw(*(const uint16_t *)s, reg); > + } else { > + size = 1; > + outb(*s, reg); > + } > + } > +#else > + RTE_SET_USED(p); > + RTE_SET_USED(data); > + RTE_SET_USED(len); > + RTE_SET_USED(offset); > +#endif > +} > + > +void > +rte_eal_pci_ioport_write(struct rte_pci_ioport *p, > + const void *data, size_t len, off_t offset) > +{ > + switch (p->dev->kdrv) { > + case RTE_KDRV_NIC_UIO: > + pci_uio_ioport_write(p, data, len, offset); > + break; > + default: > + break; > + } > +} > + > +int > +rte_eal_pci_ioport_unmap(struct rte_pci_ioport *p) > +{ > + int ret; > + > + switch (p->dev->kdrv) { > +#if defined(RTE_ARCH_X86_64) || defined(RTE_ARCH_I686) > + case RTE_KDRV_NIC_UIO: > + ret = 0; > + break; > +#endif > + default: > + ret = -1; > + break; > + } > + > + return ret; > +} > + > /* Init the PCI EAL subsystem */ > int > rte_eal_pci_init(void) > diff --git a/lib/librte_eal/bsdapp/eal/rte_eal_version.map b/lib/librte_eal/bsdapp/eal/rte_eal_version.map > index d8ac7f7..65da300 100644 > --- a/lib/librte_eal/bsdapp/eal/rte_eal_version.map > +++ b/lib/librte_eal/bsdapp/eal/rte_eal_version.map > @@ -139,6 +139,10 @@ DPDK_2.2 { > DPDK_2.3 { > global: > > + rte_eal_pci_ioport_map; > + rte_eal_pci_ioport_read; > + rte_eal_pci_ioport_unmap; > + rte_eal_pci_ioport_write; > rte_eal_pci_map_device; > rte_eal_pci_unmap_device; > rte_cpu_feature_table; > diff --git a/lib/librte_eal/common/include/rte_pci.h b/lib/librte_eal/common/include/rte_pci.h > index 1508ea9..87d08b6 100644 > --- a/lib/librte_eal/common/include/rte_pci.h > +++ b/lib/librte_eal/common/include/rte_pci.h > @@ -512,6 +512,73 @@ int rte_eal_pci_read_config(const struct rte_pci_device *device, > int rte_eal_pci_write_config(const struct rte_pci_device *device, > const void *buf, size_t len, off_t offset); > > +/** > + * A structure used to access io resources for a pci device. > + * rte_ioport_t is arch, os, driver specific, and should not be used outside > + * of pci ioport api. > + */ > +struct rte_pci_ioport { > + struct rte_pci_device *dev; > + uint64_t offset; > +}; > + > +/** > + * Initialises a rte_pci_ioport object for a pci device io resource. > + * This object is then used to gain access to those io resources (see below). > + * > + * @param dev > + * A pointer to a rte_pci_device structure describing the device. > + * to use > + * @param bar > + * Index of the io pci resource we want to access. > + * @param p > + * The rte_pci_ioport object to be initialized. > + * @return > + * 0 on success, negative on error. > + */ > +int rte_eal_pci_ioport_map(struct rte_pci_device *dev, int bar, > + struct rte_pci_ioport *p); > + > +/** > + * Release any resources used in a rte_pci_ioport object. > + * > + * @param p > + * The rte_pci_ioport object to be uninitialized. > + */ > +int rte_eal_pci_ioport_unmap(struct rte_pci_ioport *p); > + > +/** > + * Read from a io pci resource. > + * > + * @param p > + * The rte_pci_ioport object from which we want to read. > + * @param data > + * A data buffer where the bytes should be read into > + * @param len > + * The length of the data buffer. > + * @param offset > + * The offset into the pci io resource. > + * TODO: inline ? > + */ > +void rte_eal_pci_ioport_read(struct rte_pci_ioport *p, > + void *data, size_t len, off_t offset); > + > +/** > + * Write to a io pci resource. > + * > + * @param p > + * The rte_pci_ioport object to which we want to write. > + * @param data > + * A data buffer where the bytes should be read into > + * @param len > + * The length of the data buffer. > + * @param offset > + * The offset into the pci io resource. > + * TODO: inline ? > + */ > +void rte_eal_pci_ioport_write(struct rte_pci_ioport *p, > + const void *data, size_t len, off_t offset); > + > #ifdef RTE_PCI_CONFIG > /** > * Set special config space registers for performance purpose. > diff --git a/lib/librte_eal/linuxapp/eal/eal_pci.c b/lib/librte_eal/linuxapp/eal/eal_pci.c > index db947da..1b9de1e 100644 > --- a/lib/librte_eal/linuxapp/eal/eal_pci.c > +++ b/lib/librte_eal/linuxapp/eal/eal_pci.c > @@ -621,6 +621,176 @@ int rte_eal_pci_write_config(const struct rte_pci_device *device, > } > } > > +#if defined(RTE_ARCH_X86_64) || defined(RTE_ARCH_I686) > +static int > +pci_ioport_map(struct rte_pci_device *dev, int bar __rte_unused, > + struct rte_pci_ioport *p) > +{ > + uint16_t start, end; > + FILE *fp; > + char *line = NULL; > + char pci_id[16]; > + int found = 0; > + size_t linesz; > + > + snprintf(pci_id, sizeof(pci_id), PCI_PRI_FMT, > + dev->addr.domain, dev->addr.bus, > + dev->addr.devid, dev->addr.function); > + > + fp = fopen("/proc/ioports", "r"); > + if (fp == NULL) { > + RTE_LOG(ERR, EAL, "%s(): can't open ioports\n", __func__); > + return -1; > + } > + > + while (getdelim(&line, &linesz, '\n', fp) > 0) { > + char *ptr = line; > + char *left; > + int n; > + > + n = strcspn(ptr, ":"); > + ptr[n] = 0; > + left = &ptr[n + 1]; > + > + while (*left && isspace(*left)) > + left++; > + > + if (!strncmp(left, pci_id, strlen(pci_id))) { > + found = 1; > + > + while (*ptr && isspace(*ptr)) > + ptr++; > + > + sscanf(ptr, "%04hx-%04hx", &start, &end); > + > + break; > + } > + } > + > + free(line); > + fclose(fp); > + > + if (!found) > + return -1; > + > + dev->intr_handle.type = RTE_INTR_HANDLE_UNKNOWN; > + p->offset = start; > + RTE_LOG(DEBUG, EAL, "PCI Port IO found start=0x%x\n", start); > + > + return 0; > +} > +#endif > + > +int > +rte_eal_pci_ioport_map(struct rte_pci_device *dev, int bar, > + struct rte_pci_ioport *p) > +{ > + int ret; > + > + switch (dev->kdrv) { > +#ifdef VFIO_PRESENT > + case RTE_KDRV_VFIO: > + ret = -1; > + if (pci_vfio_is_enabled()) > + ret = pci_vfio_ioport_map(dev, bar, p); > + break; > +#endif > + case RTE_KDRV_IGB_UIO: > + case RTE_KDRV_UIO_GENERIC: > + ret = pci_uio_ioport_map(dev, bar, p); > + break; > + default: > +#if defined(RTE_ARCH_X86_64) || defined(RTE_ARCH_I686) > + /* special case for x86 ... */ > + ret = pci_ioport_map(dev, bar, p); > +#else > + ret = -1; > +#endif > + break; > + } > + > + if (!ret) > + p->dev = dev; > + > + return ret; > +} > + > +void > +rte_eal_pci_ioport_read(struct rte_pci_ioport *p, > + void *data, size_t len, off_t offset) > +{ > + switch (p->dev->kdrv) { > +#ifdef VFIO_PRESENT > + case RTE_KDRV_VFIO: > + pci_vfio_ioport_read(p, data, len, offset); > + break; > +#endif > + case RTE_KDRV_IGB_UIO: > + case RTE_KDRV_UIO_GENERIC: > + pci_uio_ioport_read(p, data, len, offset); > + break; > + default: > +#if defined(RTE_ARCH_X86_64) || defined(RTE_ARCH_I686) > + /* special case for x86 ... */ > + pci_uio_ioport_read(p, data, len, offset); > +#endif > + break; > + } > +} > + > +void > +rte_eal_pci_ioport_write(struct rte_pci_ioport *p, > + const void *data, size_t len, off_t offset) > +{ > + switch (p->dev->kdrv) { > +#ifdef VFIO_PRESENT > + case RTE_KDRV_VFIO: > + pci_vfio_ioport_write(p, data, len, offset); > + break; > +#endif > + case RTE_KDRV_IGB_UIO: > + case RTE_KDRV_UIO_GENERIC: > + pci_uio_ioport_write(p, data, len, offset); > + break; > + default: > +#if defined(RTE_ARCH_X86_64) || defined(RTE_ARCH_I686) > + /* special case for x86 ... */ > + pci_uio_ioport_write(p, data, len, offset); > +#endif > + break; > + } > +} > + > +int > +rte_eal_pci_ioport_unmap(struct rte_pci_ioport *p) > +{ > + int ret; > + > + switch (p->dev->kdrv) { > +#ifdef VFIO_PRESENT > + case RTE_KDRV_VFIO: > + ret = -1; > + if (pci_vfio_is_enabled()) > + ret = pci_vfio_ioport_unmap(p); > + break; > +#endif > + case RTE_KDRV_IGB_UIO: > + case RTE_KDRV_UIO_GENERIC: > + ret = pci_uio_ioport_unmap(p); > + break; > + default: > +#if defined(RTE_ARCH_X86_64) || defined(RTE_ARCH_I686) > + /* special case for x86 ... nothing to do */ > + ret = 0; > +#else > + ret = -1; > +#endif > + break; > + } > + > + return ret; > +} > + > /* Init the PCI EAL subsystem */ > int > rte_eal_pci_init(void) > diff --git a/lib/librte_eal/linuxapp/eal/eal_pci_init.h b/lib/librte_eal/linuxapp/eal/eal_pci_init.h > index a17c708..7011753 100644 > --- a/lib/librte_eal/linuxapp/eal/eal_pci_init.h > +++ b/lib/librte_eal/linuxapp/eal/eal_pci_init.h > @@ -54,6 +54,14 @@ int pci_uio_read_config(const struct rte_intr_handle *intr_handle, > int pci_uio_write_config(const struct rte_intr_handle *intr_handle, > const void *buf, size_t len, off_t offs); > > +int pci_uio_ioport_map(struct rte_pci_device *dev, int bar, > + struct rte_pci_ioport *p); > +void pci_uio_ioport_read(struct rte_pci_ioport *p, > + void *data, size_t len, off_t offset); > +void pci_uio_ioport_write(struct rte_pci_ioport *p, > + const void *data, size_t len, off_t offset); > +int pci_uio_ioport_unmap(struct rte_pci_ioport *p); > + > #ifdef VFIO_PRESENT > > #define VFIO_MAX_GROUPS 64 > @@ -68,6 +76,14 @@ int pci_vfio_read_config(const struct rte_intr_handle *intr_handle, > int pci_vfio_write_config(const struct rte_intr_handle *intr_handle, > const void *buf, size_t len, off_t offs); > > +int pci_vfio_ioport_map(struct rte_pci_device *dev, int bar, > + struct rte_pci_ioport *p); > +void pci_vfio_ioport_read(struct rte_pci_ioport *p, > + void *data, size_t len, off_t offset); > +void pci_vfio_ioport_write(struct rte_pci_ioport *p, > + const void *data, size_t len, off_t offset); > +int pci_vfio_ioport_unmap(struct rte_pci_ioport *p); > + > /* map VFIO resource prototype */ > int pci_vfio_map_resource(struct rte_pci_device *dev); > int pci_vfio_get_group_fd(int iommu_group_fd); > diff --git a/lib/librte_eal/linuxapp/eal/eal_pci_uio.c b/lib/librte_eal/linuxapp/eal/eal_pci_uio.c > index ac50e13..f891dda 100644 > --- a/lib/librte_eal/linuxapp/eal/eal_pci_uio.c > +++ b/lib/librte_eal/linuxapp/eal/eal_pci_uio.c > @@ -39,6 +39,10 @@ > #include > #include > > +#if defined(RTE_ARCH_X86_64) || defined(RTE_ARCH_I686) > +#include > +#endif > + > #include > #include > #include > @@ -145,7 +149,7 @@ pci_mknod_uio_dev(const char *sysfs_uio_path, unsigned uio_num) > */ > static int > pci_get_uio_dev(struct rte_pci_device *dev, char *dstbuf, > - unsigned int buflen) > + unsigned int buflen, int create) > { > struct rte_pci_addr *loc = &dev->addr; > unsigned int uio_num; > @@ -208,7 +212,7 @@ pci_get_uio_dev(struct rte_pci_device *dev, char *dstbuf, > return -1; > > /* create uio device if we've been asked to */ > - if (internal_config.create_uio_dev && > + if (internal_config.create_uio_dev && create && > pci_mknod_uio_dev(dstbuf, uio_num) < 0) > RTE_LOG(WARNING, EAL, "Cannot create /dev/uio%u\n", uio_num); > > @@ -245,7 +249,7 @@ pci_uio_alloc_resource(struct rte_pci_device *dev, > loc = &dev->addr; > > /* find uio resource */ > - uio_num = pci_get_uio_dev(dev, dirname, sizeof(dirname)); > + uio_num = pci_get_uio_dev(dev, dirname, sizeof(dirname), 1); > if (uio_num < 0) { > RTE_LOG(WARNING, EAL, " "PCI_PRI_FMT" not managed by UIO driver, " > "skipping\n", loc->domain, loc->bus, loc->devid, loc->function); > @@ -363,3 +367,125 @@ error: > rte_free(maps[map_idx].path); > return -1; > } > + > +int > +pci_uio_ioport_map(struct rte_pci_device *dev, int bar, > + struct rte_pci_ioport *p) > +{ > +#if defined(RTE_ARCH_X86_64) || defined(RTE_ARCH_I686) > + char dirname[PATH_MAX]; > + char filename[PATH_MAX]; > + int uio_num; > + unsigned long start; > + > + uio_num = pci_get_uio_dev(dev, dirname, sizeof(dirname), 0); > + if (uio_num < 0) > + return -1; > + > + /* get portio start */ > + snprintf(filename, sizeof(filename), > + "%s/portio/port%d/start", dirname, bar); > + if (eal_parse_sysfs_value(filename, &start) < 0) { > + RTE_LOG(ERR, EAL, "%s(): cannot parse portio start\n", > + __func__); > + return -1; > + } > + /* ensure we don't get anything funny here, read/write will cast to > + * uin16_t */ > + if (start > UINT16_MAX) > + return -1; > + > + /* FIXME only for primary process ? */ > + if (dev->intr_handle.type == RTE_INTR_HANDLE_UNKNOWN) { > + > + snprintf(filename, sizeof(filename), "/dev/uio%u", uio_num); > + dev->intr_handle.fd = open(filename, O_RDWR); > + if (dev->intr_handle.fd < 0) { > + RTE_LOG(ERR, EAL, "Cannot open %s: %s\n", > + filename, strerror(errno)); > + return -1; > + } > + dev->intr_handle.type = RTE_INTR_HANDLE_UIO; > + } > + > + RTE_LOG(DEBUG, EAL, "PCI Port IO found start=0x%lx\n", start); > + > + p->offset = start; > + return 0; > +#else > + RTE_SET_USED(dev); > + RTE_SET_USED(bar); > + RTE_SET_USED(p); > + return -1; > +#endif > +} > + > +void > +pci_uio_ioport_read(struct rte_pci_ioport *p, > + void *data, size_t len, off_t offset) > +{ > +#if defined(RTE_ARCH_X86_64) || defined(RTE_ARCH_I686) > + uint8_t *d; > + int size; > + unsigned short reg = p->offset + offset; > + > + for (d = data; len > 0; d += size, reg += size, len -= size) { > + if (len >= 4) { > + size = 4; > + *(uint32_t *)d = inl(reg); > + } else if (len >= 2) { > + size = 2; > + *(uint16_t *)d = inw(reg); > + } else { > + size = 1; > + *d = inb(reg); > + } > + } > +#else > + RTE_SET_USED(p); > + RTE_SET_USED(data); > + RTE_SET_USED(len); > + RTE_SET_USED(offset); > +#endif > +} > + > +void > +pci_uio_ioport_write(struct rte_pci_ioport *p, > + const void *data, size_t len, off_t offset) > +{ > +#if defined(RTE_ARCH_X86_64) || defined(RTE_ARCH_I686) > + const uint8_t *s; > + int size; > + unsigned short reg = p->offset + offset; > + > + for (s = data; len > 0; s += size, reg += size, len -= size) { > + if (len >= 4) { > + size = 4; > + outl_p(*(const uint32_t *)s, reg); > + } else if (len >= 2) { > + size = 2; > + outw_p(*(const uint16_t *)s, reg); > + } else { > + size = 1; > + outb_p(*s, reg); > + } > + } > +#else > + RTE_SET_USED(p); > + RTE_SET_USED(data); > + RTE_SET_USED(len); > + RTE_SET_USED(offset); > +#endif > +} > + > +int > +pci_uio_ioport_unmap(struct rte_pci_ioport *p) > +{ > + RTE_SET_USED(p); > +#if defined(RTE_ARCH_X86_64) || defined(RTE_ARCH_I686) > + /* FIXME close intr fd ? */ > + return 0; > +#else > + return -1; > +#endif > +} > diff --git a/lib/librte_eal/linuxapp/eal/eal_pci_vfio.c b/lib/librte_eal/linuxapp/eal/eal_pci_vfio.c > index a6c7e16..ffa2dd0 100644 > --- a/lib/librte_eal/linuxapp/eal/eal_pci_vfio.c > +++ b/lib/librte_eal/linuxapp/eal/eal_pci_vfio.c > @@ -976,6 +976,43 @@ pci_vfio_map_resource(struct rte_pci_device *dev) > } > > int > +pci_vfio_ioport_map(struct rte_pci_device *dev, int bar, > + struct rte_pci_ioport *p) > +{ > + RTE_SET_USED(dev); > + RTE_SET_USED(bar); > + RTE_SET_USED(p); > + return -1; > +} > + > +void > +pci_vfio_ioport_read(struct rte_pci_ioport *p, > + void *data, size_t len, off_t offset) > +{ > + RTE_SET_USED(p); > + RTE_SET_USED(data); > + RTE_SET_USED(len); > + RTE_SET_USED(offset); > +} > + > +void > +pci_vfio_ioport_write(struct rte_pci_ioport *p, > + const void *data, size_t len, off_t offset) > +{ > + RTE_SET_USED(p); > + RTE_SET_USED(data); > + RTE_SET_USED(len); > + RTE_SET_USED(offset); > +} > + > +int > +pci_vfio_ioport_unmap(struct rte_pci_ioport *p) > +{ > + RTE_SET_USED(p); > + return -1; > +} > + > +int > pci_vfio_enable(void) > { > /* initialize group list */ > diff --git a/lib/librte_eal/linuxapp/eal/rte_eal_version.map b/lib/librte_eal/linuxapp/eal/rte_eal_version.map > index 4c09c0b..dea260d 100644 > --- a/lib/librte_eal/linuxapp/eal/rte_eal_version.map > +++ b/lib/librte_eal/linuxapp/eal/rte_eal_version.map > @@ -142,6 +142,10 @@ DPDK_2.2 { > DPDK_2.3 { > global: > > + rte_eal_pci_ioport_map; > + rte_eal_pci_ioport_read; > + rte_eal_pci_ioport_unmap; > + rte_eal_pci_ioport_write; > rte_eal_pci_map_device; > rte_eal_pci_unmap_device; > rte_cpu_feature_table; > -- > 1.9.1 >