From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-pf0-f176.google.com (mail-pf0-f176.google.com [209.85.192.176]) by dpdk.org (Postfix) with ESMTP id BCCE68D8F for ; Tue, 2 Feb 2016 05:14:14 +0100 (CET) Received: by mail-pf0-f176.google.com with SMTP id 65so95638991pfd.2 for ; Mon, 01 Feb 2016 20:14:14 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=mvista-com.20150623.gappssmtp.com; s=20150623; h=mime-version:in-reply-to:references:date:message-id:subject:from:to :cc:content-type; bh=N741/fQ8+odRBoqjvdcGvlfTWSLf5GAff1UxVsCJmW8=; b=jDWIS1XJN/NB1IdGfmBm9SQVnk3DHNYlfn/68wHVBqI9+KLsHP2fnoojP09aX+EHWw s5ZdDUvg/2LoJTE/6RcAr2YSXWBKyKdi0rdHJA77HL8cJ+nwuRrXtSevS6l5m7wknloY DMD5NQkCfV+HaAiJoi64s4w6N3l2THzxmmPBjjGEEjAfP1i0Mx5Y6Wi1wOTGOzOnwb4P mvAETmsnTfeUHNNLNE6O5MUyUgy6f3hLqCre18lDxdSOjr0l5Eb3g36ejoCZ9fv9w6UJ BEDsH/sRUtIt+eoiyPlMGU3YBwaluunsefjdbDg7ryU3Fy534tFJxHoBBjIrhKZqhS2y 9jUg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:in-reply-to:references:date :message-id:subject:from:to:cc:content-type; bh=N741/fQ8+odRBoqjvdcGvlfTWSLf5GAff1UxVsCJmW8=; b=FvvD2w/uQ1UFkRZT09wo0sdNRGqJV9wQEYtY1wGYRe3Nzaa1BdAYHpyhf21Yk0I7xq h02CfEJaDbiB2hWC42YIrgjukKTEI1ymFkwv/jEcZpWwyPrDlyRVXug8rMiJp52TJ6sv Oucwbvw8uMvHOl3ZHSAcNxyW/SHY3KOyUzKHnabM9O0LhYE57uWU1wo3H+B4CMD4qeVq +N6CPTFQrTouQsTQRa7pp+ZxjNeCzJb5/YFB0T1t/L/ZbTvD5LekGqBNGHhE2MWdvxfA pNraARHFAw8Dm5C99soNu73pd9VvW7xlb8jdeVm91d110TtLbfu1/c1C2C3+1r96n8u0 Ye8w== X-Gm-Message-State: AG10YOR975/KPHzmiAvGJHZchupyJxcHceBcJ4MHU9+xmFdUEshiobSMVZ/+yJO+3VqXq8ybNlp9mCOKzCQ8PJCk MIME-Version: 1.0 X-Received: by 10.98.14.69 with SMTP id w66mr44232825pfi.144.1454386454143; Mon, 01 Feb 2016 20:14:14 -0800 (PST) Received: by 10.66.12.132 with HTTP; Mon, 1 Feb 2016 20:14:14 -0800 (PST) In-Reply-To: <20160201134854.GE4257@yliu-dev.sh.intel.com> References: <1454091717-32251-1-git-send-email-sshukla@mvista.com> <20160201134854.GE4257@yliu-dev.sh.intel.com> Date: Tue, 2 Feb 2016 09:44:14 +0530 Message-ID: From: Santosh Shukla To: Yuanhan Liu Content-Type: text/plain; charset=UTF-8 Cc: dev@dpdk.org Subject: Re: [dpdk-dev] [PATCH v6 1/8] eal: pci: add api to rd/wr pci bar region X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 02 Feb 2016 04:14:15 -0000 On Mon, Feb 1, 2016 at 7:18 PM, Yuanhan Liu wrote: > On Fri, Jan 29, 2016 at 11:51:50PM +0530, Santosh Shukla wrote: >> Introducing below api for pci bar region rd/wr. >> Api's are: >> - rte_eal_pci_read_bar >> - rte_eal_pci_write_bar >> >> Signed-off-by: Santosh Shukla >> --- >> v5-->v6: >> - update api infor in rte_eal_version.map file >> suggested by david manchand. >> >> lib/librte_eal/bsdapp/eal/eal_pci.c | 19 ++++++++++++ >> lib/librte_eal/bsdapp/eal/rte_eal_version.map | 3 ++ >> lib/librte_eal/common/include/rte_pci.h | 38 +++++++++++++++++++++++ >> lib/librte_eal/linuxapp/eal/eal_pci.c | 34 ++++++++++++++++++++ >> lib/librte_eal/linuxapp/eal/eal_pci_init.h | 6 ++++ >> lib/librte_eal/linuxapp/eal/eal_pci_vfio.c | 28 +++++++++++++++++ >> lib/librte_eal/linuxapp/eal/rte_eal_version.map | 3 ++ >> 7 files changed, 131 insertions(+) >> >> diff --git a/lib/librte_eal/bsdapp/eal/eal_pci.c b/lib/librte_eal/bsdapp/eal/eal_pci.c >> index 95c32c1..2e535ea 100644 >> --- a/lib/librte_eal/bsdapp/eal/eal_pci.c >> +++ b/lib/librte_eal/bsdapp/eal/eal_pci.c > ... >> +int rte_eal_pci_read_bar(const struct rte_pci_device *device, >> + void *buf, size_t len, off_t offset, >> + int bar_idx) >> + >> +{ >> + const struct rte_intr_handle *intr_handle = &device->intr_handle; > > I'd suggest to reference this var inside pci_vfio_read/write_bar(), and > pass device as the parmater instead. > (Sorry for late reply, I was travelling on Monday.) Make sense. >> + >> + switch (device->kdrv) { >> + case RTE_KDRV_VFIO: >> + return pci_vfio_read_bar(intr_handle, buf, len, >> + offset, bar_idx); >> + default: >> + RTE_LOG(ERR, EAL, "write bar not supported by driver\n"); > ^^^^^ > typo. > Oh, r / write / read, right? sorry for typo error (:- > > BTW, I have a question about this API. Obviously, reading/writing bar > space is supported with UIO (when memory resource is mmapped). And I > know why you introduced such 2 APIs, for reading IO bar. > > So, here is the question: what are the 2 APIs for, for being gerneric > APIs to read/write bar spaces, or just to read IO bar spaces? If it's > former, the message is wrong; if it's later, you may better rename it > to rte_eal_pci_read/write_io_bar()? > Current use-case is virtio: It is used as io_bar which is first bar[1]. But implementation is generic, can be used to do rd/wr for other bar index too. Also vfio facilitate user to do rd/wr to pci_bars w/o mapping that bar, So apis will be useful for such cases in future. AFAIU: uio has read/write_config api only and Yes if bar region mapped then no need to do rd/wr, user can directly access the pci_memory. But use-case of this api entirely different: unmapped memory by application context i.e.. vfio_rd/wr-way {pread/pwrite-way}. Is above explanation convincing? Pl. let me know. [1] https://en.wikipedia.org/wiki/PCI_configuration_space (first bar offset 0x010) > David, what do you think of that? > > >> + return -1; >> + } >> +} >> + > ... >> +int >> +pci_vfio_read_bar(const struct rte_intr_handle *intr_handle, >> + void *buf, size_t len, off_t offs, int bar_idx) >> +{ >> + if (bar_idx < VFIO_PCI_BAR0_REGION_INDEX >> + || bar_idx > VFIO_PCI_BAR5_REGION_INDEX) { > > A minor nit: it's more nature to put the '||' at the end of expression, > instead of at the front: > > if (bar_idx < VFIO_PCI_BAR0_REGION_INDEX || > bar_idx > VFIO_PCI_BAR5_REGION_INDEX) { > > > --yliu