From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-pf0-f180.google.com (mail-pf0-f180.google.com [209.85.192.180]) by dpdk.org (Postfix) with ESMTP id 9E950567C for ; Mon, 18 Jan 2016 08:39:49 +0100 (CET) Received: by mail-pf0-f180.google.com with SMTP id q63so158110189pfb.1 for ; Sun, 17 Jan 2016 23:39:49 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=mvista-com.20150623.gappssmtp.com; s=20150623; h=mime-version:in-reply-to:references:date:message-id:subject:from:to :cc:content-type; bh=sIGvCXF1zI3B9lmzooodmrkgWbr1lyntJylW1wNOOw4=; b=wF5wDfe5Il8hyXyEiJIf7oMFj8tjbSkVxbPJxKOtIXIvkXINzaEETLI9UIw0deiyqR 92JuLlar07lxzqMzCnN9QVoufuUeHfKi/lrC7rTjTbKptLY6cKlwZdB3c+7a/kv3Zt+3 rPuZKSElviGe+Px3iXzK9VGGEl3mGIqhariOQezLeph5W2fnximGXvP3/k7PgYXusM/h NjVnE79yOMY1SShAtOLS+8/5VC0huKHoN6K3g1f0Xt6FPoAk5JG37meQ3l2womy2JXmM 32RyS5Rjk6Ixv+efoE6lgPYfaKWC3To3f3akgAgtyzydV0Nc83vUfu+LnRd7loNUlV2/ nkMQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:in-reply-to:references:date :message-id:subject:from:to:cc:content-type; bh=sIGvCXF1zI3B9lmzooodmrkgWbr1lyntJylW1wNOOw4=; b=UdhipfdCSWW1Z42Q2cNGJ8DJ7d2tJvLu47OrHxUJLejEGXRQtMfnPz7GhCaeUTzDVH k3Bj4aCoPUn5KjOYm0ggrL6RkmS92mZ+tmdOyYWqVYCmOlPzw7zTFgM+9SJ72pLr7KG/ V4NW7WcaXLBILSsSzKrOMrK/WO64bCc4HAUbN7kmfRvCaIak7ss/QJHeMf7Tv3tBZML1 qcZnOvZB2WctCrD9q6wpi+al6kd2mt8RrVQ1Lpg/w7UebUYx4CkLIcoMwcJqIvI+o9Yh AIhoUxiaQxByUUyLNgmlSKsyNX1Xqjkxvf4qS7JxHPQ/JFT8th6FeL/1W35GxpZnxLmK wJ2g== X-Gm-Message-State: ALoCoQmQ/0AU465mQG6aozu+dtb1L1YENEynQtZlk+x6/X/sqaYuZlHWr1LgZg+wtewS5fP9e+Qh8oS54Pe9oknoidsIg45Kgi3zMUcLQSQEbg9No1pjUEg= MIME-Version: 1.0 X-Received: by 10.98.0.7 with SMTP id 7mr33641547pfa.5.1453102788729; Sun, 17 Jan 2016 23:39:48 -0800 (PST) Received: by 10.66.196.81 with HTTP; Sun, 17 Jan 2016 23:39:48 -0800 (PST) In-Reply-To: <569C8D53.8080704@redhat.com> References: <1452778117-30178-1-git-send-email-sshukla@mvista.com> <1452778117-30178-9-git-send-email-sshukla@mvista.com> <569C8D53.8080704@redhat.com> Date: Mon, 18 Jan 2016 13:09:48 +0530 Message-ID: From: Santosh Shukla To: Jason Wang Content-Type: text/plain; charset=UTF-8 Cc: dev@dpdk.org, "Michael S. Tsirkin" Subject: Re: [dpdk-dev] [PATCH v4 08/14] virtio: pci: extend virtio pci rw api for vfio interface X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 18 Jan 2016 07:39:50 -0000 On Mon, Jan 18, 2016 at 12:29 PM, Jason Wang wrote: > > > On 01/14/2016 09:28 PM, Santosh Shukla wrote: >> So far virtio handle rw access for uio / ioport interface, This patch to extend >> the support for vfio interface. For that introducing private struct >> virtio_vfio_dev{ >> - is_vfio >> - pci_dev >> }; >> Signed-off-by: Santosh Shukla >> --- >> v3->v4: >> - Removed #indef RTE_EAL_VFIO and made it arch agnostic such now virtio_pci >> rd/wr api to handle both vfio and ig_uio/ioport interfaces, depending upon >> is_vfio flags set or unset. >> - Tested for x86 for igb_uio and vfio interface, also tested for arm64 for vfio >> interface. >> >> drivers/net/virtio/virtio_pci.h | 84 ++++++++++++++++++++++++++++++++------- >> 1 file changed, 70 insertions(+), 14 deletions(-) > > Interesting. I'm working on IOMMU cooperation with virtio[1]. For pmd, > it looks like the only thing missed is RTE_PCI_DRV_NEED_MAPPING for > virito-net pmd. > not missing anymore, I am using rte_eal_pci_map() api so to map virtio pci dev to userspace. > So I'm curious whether this is still necessary if IOMMU can work with > virito in the future. > So far I'm using pmd driver in vfio-noiommu way. AFAIk, pmd driver use dma for tx side. I glanced through your patch, to me it would be interesting to try out, but right now I am not sure. We'll come back I guess. Thanks > [1] https://www.mail-archive.com/qemu-devel@nongnu.org/msg337079.html > > Thanks > >> >> diff --git a/drivers/net/virtio/virtio_pci.h b/drivers/net/virtio/virtio_pci.h >> index 8b5b031..8526c07 100644 >> --- a/drivers/net/virtio/virtio_pci.h >> +++ b/drivers/net/virtio/virtio_pci.h >> @@ -46,6 +46,8 @@ >> #endif >> >> #include >> +#include >> +#include "virtio_vfio_rw.h" >> >> struct virtqueue; >> >> @@ -165,6 +167,14 @@ struct virtqueue; >> */ >> #define VIRTIO_MAX_VIRTQUEUES 8 >> >> +/* For vfio only */ >> +struct virtio_vfio_dev { >> + bool is_vfio; /* True: vfio i/f, >> + * False: not a vfio i/f >> + */ >> + struct rte_pci_device *pci_dev; /* vfio dev */ >> +}; >> + >> struct virtio_hw { >> struct virtqueue *cvq; >> uint32_t io_base; >> @@ -176,6 +186,7 @@ struct virtio_hw { >> uint8_t use_msix; >> uint8_t started; >> uint8_t mac_addr[ETHER_ADDR_LEN]; >> + struct virtio_vfio_dev dev; >> }; >> >> /* >> @@ -231,20 +242,65 @@ outl_p(unsigned int data, unsigned int port) >> #define VIRTIO_PCI_REG_ADDR(hw, reg) \ >> (unsigned short)((hw)->io_base + (reg)) >> >> -#define VIRTIO_READ_REG_1(hw, reg) \ >> - inb((VIRTIO_PCI_REG_ADDR((hw), (reg)))) >> -#define VIRTIO_WRITE_REG_1(hw, reg, value) \ >> - outb_p((unsigned char)(value), (VIRTIO_PCI_REG_ADDR((hw), (reg)))) >> - >> -#define VIRTIO_READ_REG_2(hw, reg) \ >> - inw((VIRTIO_PCI_REG_ADDR((hw), (reg)))) >> -#define VIRTIO_WRITE_REG_2(hw, reg, value) \ >> - outw_p((unsigned short)(value), (VIRTIO_PCI_REG_ADDR((hw), (reg)))) >> - >> -#define VIRTIO_READ_REG_4(hw, reg) \ >> - inl((VIRTIO_PCI_REG_ADDR((hw), (reg)))) >> -#define VIRTIO_WRITE_REG_4(hw, reg, value) \ >> - outl_p((unsigned int)(value), (VIRTIO_PCI_REG_ADDR((hw), (reg)))) >> +#define VIRTIO_READ_REG_1(hw, reg) \ >> +({ \ >> + uint8_t ret; \ >> + struct virtio_vfio_dev *vdev; \ >> + (vdev) = (&(hw)->dev); \ >> + (((vdev)->is_vfio) ? \ >> + (ioport_inb(((vdev)->pci_dev), reg, &ret)) : \ >> + ((ret) = (inb((VIRTIO_PCI_REG_ADDR((hw), (reg))))))); \ >> + ret; \ >> +}) >> + >> +#define VIRTIO_WRITE_REG_1(hw, reg, value) \ >> +({ \ >> + struct virtio_vfio_dev *vdev; \ >> + (vdev) = (&(hw)->dev); \ >> + (((vdev)->is_vfio) ? \ >> + (ioport_outb_p(((vdev)->pci_dev), reg, (uint8_t)(value))) : \ >> + (outb_p((unsigned char)(value), (VIRTIO_PCI_REG_ADDR((hw), (reg)))))); \ >> +}) >> + >> +#define VIRTIO_READ_REG_2(hw, reg) \ >> +({ \ >> + uint16_t ret; \ >> + struct virtio_vfio_dev *vdev; \ >> + (vdev) = (&(hw)->dev); \ >> + (((vdev)->is_vfio) ? \ >> + (ioport_inw(((vdev)->pci_dev), reg, &ret)) : \ >> + ((ret) = (inw((VIRTIO_PCI_REG_ADDR((hw), (reg))))))); \ >> + ret; \ >> +}) >> + >> +#define VIRTIO_WRITE_REG_2(hw, reg, value) \ >> +({ \ >> + struct virtio_vfio_dev *vdev; \ >> + (vdev) = (&(hw)->dev); \ >> + (((vdev)->is_vfio) ? \ >> + (ioport_outw_p(((vdev)->pci_dev), reg, (uint16_t)(value))) : \ >> + (outw_p((unsigned short)(value), (VIRTIO_PCI_REG_ADDR((hw), (reg)))))); \ >> +}) >> + >> +#define VIRTIO_READ_REG_4(hw, reg) \ >> +({ \ >> + uint32_t ret; \ >> + struct virtio_vfio_dev *vdev; \ >> + (vdev) = (&(hw)->dev); \ >> + (((vdev)->is_vfio) ? \ >> + (ioport_inl(((vdev)->pci_dev), reg, &ret)) : \ >> + ((ret) = (inl((VIRTIO_PCI_REG_ADDR((hw), (reg))))))); \ >> + ret; \ >> +}) >> + >> +#define VIRTIO_WRITE_REG_4(hw, reg, value) \ >> +({ \ >> + struct virtio_vfio_dev *vdev; \ >> + (vdev) = (&(hw)->dev); \ >> + (((vdev)->is_vfio) ? \ >> + (ioport_outl_p(((vdev)->pci_dev), reg, (uint32_t)(value))) : \ >> + (outl_p((unsigned int)(value), (VIRTIO_PCI_REG_ADDR((hw), (reg)))))); \ >> +}) >> >> static inline int >> vtpci_with_feature(struct virtio_hw *hw, uint32_t bit) >