From: Radha Mohan <mohun106@gmail.com>
To: fengchengwen <fengchengwen@huawei.com>
Cc: Radha Mohan Chintakuntla <radhac@marvell.com>,
Thomas Monjalon <thomas@monjalon.net>,
Nithin Dabilpuram <ndabilpuram@marvell.com>,
Kiran Kumar K <kirankumark@marvell.com>,
Sunil Kumar Kori <skori@marvell.com>,
Satha Koteswara Rao Kottidi <skoteshwar@marvell.com>,
Jerin Jacob Kollanukkaran <jerinj@marvell.com>,
Satananda Burla <sburla@marvell.com>, dpdk-dev <dev@dpdk.org>
Subject: Re: [dpdk-dev] [PATCH v2 3/4] dma/cnxk: add dma channel operations
Date: Tue, 2 Nov 2021 11:11:51 -0700 [thread overview]
Message-ID: <CAC8NTUUrTpArDJwYkJEUTxzFqxCx5dZ5rR+gpoXeVtjp-ZH0Zw@mail.gmail.com> (raw)
In-Reply-To: <43d57695-78be-96a9-b63a-ff27105f18e1@huawei.com>
On Tue, Nov 2, 2021 at 5:00 AM fengchengwen <fengchengwen@huawei.com> wrote:
>
> On 2021/11/2 11:40, Radha Mohan Chintakuntla wrote:
> > Add functions for the dmadev vchan setup and DMA operations.
> >
> > Signed-off-by: Radha Mohan Chintakuntla <radhac@marvell.com>
>
> ...
>
> >
> > +static int
> > +cnxk_dmadev_info_get(const struct rte_dma_dev *dev,
> > + struct rte_dma_info *dev_info, uint32_t size)
> > +{
> > + RTE_SET_USED(dev);
> > + RTE_SET_USED(size);
> > +
> > + dev_info->max_vchans = 1;
> > + dev_info->nb_vchans = 1;
> > + dev_info->dev_capa = RTE_DMA_CAPA_MEM_TO_MEM |
> > + RTE_DMA_CAPA_MEM_TO_DEV | RTE_DMA_CAPA_DEV_TO_MEM |
> > + RTE_DMA_CAPA_OPS_COPY;
> > + dev_info->max_desc = DPI_MAX_DESC;
> > + dev_info->min_desc = 1;
> > + dev_info->max_sges = DPI_MAX_POINTER;
> > +
> > + return 0;
> > +}
> > +
> > +static int
> > +cnxk_dmadev_configure(struct rte_dma_dev *dev,
> > + const struct rte_dma_conf *conf, uint32_t conf_sz)
> > +{
> > + struct cnxk_dpi_vf_s *dpivf = NULL;
> > + int rc = 0;
> > +
> > + RTE_SET_USED(conf);
> > + RTE_SET_USED(conf);
> > + RTE_SET_USED(conf_sz);
> > + RTE_SET_USED(conf_sz);
> > + dpivf = dev->fp_obj->dev_private;
> > + rc = roc_dpi_configure(&dpivf->rdpi);
> > + if (rc < 0)
> > + plt_err("DMA configure failed err = %d", rc);
> > +
> > + return rc;
> > +}
> > +
> > +static int
> > +cnxk_dmadev_vchan_setup(struct rte_dma_dev *dev, uint16_t vchan,
> > + const struct rte_dma_vchan_conf *conf,
> > + uint32_t conf_sz)
> > +{
> > + struct cnxk_dpi_vf_s *dpivf = dev->fp_obj->dev_private;
> > + struct cnxk_dpi_compl_s *comp_data;
> > + union dpi_instr_hdr_s *header = &dpivf->conf.hdr;
> > + int i;
> > +
> > + RTE_SET_USED(vchan);
> > + RTE_SET_USED(conf_sz);
> > +
> > + header->s.pt = DPI_HDR_PT_ZBW_CA;
> > +
> > + switch (conf->direction) {
> > + case RTE_DMA_DIR_DEV_TO_MEM:
> > + header->s.xtype = DPI_XTYPE_INBOUND;
> > + header->s.lport = conf->src_port.pcie.coreid;
> > + header->s.fport = 0;
> > + header->s.pvfe = 1;
> > + break;
> > + case RTE_DMA_DIR_MEM_TO_DEV:
> > + header->s.xtype = DPI_XTYPE_OUTBOUND;
> > + header->s.lport = 0;
> > + header->s.fport = conf->dst_port.pcie.coreid;
> > + header->s.pvfe = 1;
> > + break;
> > + case RTE_DMA_DIR_MEM_TO_MEM:
> > + header->s.xtype = DPI_XTYPE_INTERNAL_ONLY;
> > + header->s.lport = 0;
> > + header->s.fport = 0;
> > + header->s.pvfe = 0;
> > + break;
> > + case RTE_DMA_DIR_DEV_TO_DEV:
> > + header->s.xtype = DPI_XTYPE_EXTERNAL_ONLY;
> > + header->s.lport = conf->src_port.pcie.coreid;
> > + header->s.fport = conf->dst_port.pcie.coreid;
>
> capability don't declare support DEV_TO_DEV, and framework will ensure
> not pass DEV_TO_DEV direction. so this code could remove...
I missed adding DEV_TO_DEV in capability. Thank you for pointing that out.
>
> > + };
> > +
> > + for (i = 0; i < conf->nb_desc; i++) {
> > + comp_data = rte_zmalloc(NULL, sizeof(*comp_data), 0);
>
> why not check comp_data's validation ?
Sure will add.
<snip>
> > +
> > +static int
> > +cnxk_dmadev_copy(void *dev_private, uint16_t vchan, rte_iova_t src,
> > + rte_iova_t dst, uint32_t length, uint64_t flags)
> > +{
> > + struct cnxk_dpi_vf_s *dpivf = dev_private;
> > + union dpi_instr_hdr_s *header = &dpivf->conf.hdr;
> > + struct cnxk_dpi_compl_s *comp_ptr;
> > + rte_iova_t fptr, lptr;
> > + int num_words = 0;
> > + int rc;
> > +
> > + RTE_SET_USED(vchan);
> > +
> > + comp_ptr = dpivf->conf.c_desc.compl_ptr[dpivf->conf.c_desc.tail];
> > + comp_ptr->cdata = DPI_REQ_CDATA;
> > + header->s.ptr = (uint64_t)comp_ptr;
> > + STRM_INC(dpivf->conf.c_desc);
> > +
> > + header->s.nfst = 1;
> > + header->s.nlst = 1;
> > +
> > + /*
> > + * For inbound case, src pointers are last pointers.
> > + * For all other cases, src pointers are first pointers.
> > + */
> > + if (header->s.xtype == DPI_XTYPE_INBOUND) {
> > + fptr = dst;
> > + lptr = src;
> > + } else {
> > + fptr = src;
> > + lptr = dst;
> > + }
> > +
> > + dpivf->cmd[0] = header->u[0];
> > + dpivf->cmd[1] = header->u[1];
> > + dpivf->cmd[2] = header->u[2];
> > + /* word3 is always 0 */
> > + num_words += 4;
> > + dpivf->cmd[num_words++] = length;
> > + dpivf->cmd[num_words++] = fptr;
> > + dpivf->cmd[num_words++] = length;
> > + dpivf->cmd[num_words++] = lptr;
> > +
> > + rc = __dpi_queue_write(&dpivf->rdpi, dpivf->cmd, num_words);
> > + if (!rc) {
> > + if (flags & RTE_DMA_OP_FLAG_SUBMIT) {
> > + rte_wmb();
> > + plt_write64(num_words,
> > + dpivf->rdpi.rbase + DPI_VDMA_DBELL);
> > + }
> > + dpivf->num_words = num_words;
> > + }
> > +
> > + return rc;
>
> I notice __dpi_queue_write will return 0 if success, but I should return the
> index in the range of [0, 0xffff].
ack
>
> > +}
> > +
> > +static uint16_t
> > +cnxk_dmadev_completed(void *dev_private, uint16_t vchan, const uint16_t nb_cpls,
> > + uint16_t *last_idx, bool *has_error)
> > +{
> > + struct cnxk_dpi_vf_s *dpivf = dev_private;
> > + int cnt;
> > +
> > + RTE_SET_USED(vchan);
> > + RTE_SET_USED(last_idx);
> > + RTE_SET_USED(has_error);
> > + for (cnt = 0; cnt < nb_cpls; cnt++) {
> > + struct cnxk_dpi_compl_s *comp_ptr =
> > + dpivf->conf.c_desc.compl_ptr[cnt];
> > +
> > + if (comp_ptr->cdata)
>
> this mean error, should set *has_error = true.
>
> > + break;
> > + }
> > +
> > + dpivf->conf.c_desc.tail = cnt;
>
> and also return the last_idx which framework demands.
ack.
>
> > +
> > + return cnt;
> > +}
> > +
> > +static uint16_t
> > +cnxk_dmadev_completed_status(void *dev_private, uint16_t vchan,
> > + const uint16_t nb_cpls, uint16_t *last_idx,
> > + enum rte_dma_status_code *status)
> > +{
> > + struct cnxk_dpi_vf_s *dpivf = dev_private;
> > + int cnt;
> > +
> > + RTE_SET_USED(vchan);
> > + RTE_SET_USED(last_idx);
> > + for (cnt = 0; cnt < nb_cpls; cnt++) {
> > + struct cnxk_dpi_compl_s *comp_ptr =
> > + dpivf->conf.c_desc.compl_ptr[cnt];
> > + status[cnt] = comp_ptr->cdata;
> > + }
> > +
> > + dpivf->conf.c_desc.tail = 0;
>
> return the last_idx which framework demands.
>
> > + return cnt;
> > +}
> > +
> > +static int
> > +cnxk_dmadev_submit(void *dev_private, uint16_t vchan __rte_unused)
> > +{
> > + struct cnxk_dpi_vf_s *dpivf = dev_private;
> > +
> > + rte_wmb();
> > + plt_write64(dpivf->num_words, dpivf->rdpi.rbase + DPI_VDMA_DBELL);
> > +
> > + return 0;
> > +}
> > +
> > +static const struct rte_dma_dev_ops cnxk_dmadev_ops = {
> > + .dev_info_get = cnxk_dmadev_info_get,
> > + .dev_configure = cnxk_dmadev_configure,
> > + .dev_start = cnxk_dmadev_start,
> > + .dev_stop = cnxk_dmadev_stop,
> > + .vchan_setup = cnxk_dmadev_vchan_setup,
> > + .dev_close = cnxk_dmadev_close,
> > +};
> > +
> > static int
> > cnxk_dmadev_probe(struct rte_pci_driver *pci_drv __rte_unused,
> > struct rte_pci_device *pci_dev)
> > @@ -50,6 +366,12 @@ cnxk_dmadev_probe(struct rte_pci_driver *pci_drv __rte_unused,
> >
> > dmadev->device = &pci_dev->device;
> > dmadev->fp_obj->dev_private = dpivf;
> > + dmadev->dev_ops = &cnxk_dmadev_ops;
> > +
> > + dmadev->fp_obj->copy = cnxk_dmadev_copy;
> > + dmadev->fp_obj->submit = cnxk_dmadev_submit;
> > + dmadev->fp_obj->completed = cnxk_dmadev_completed;
> > + dmadev->fp_obj->completed_status = cnxk_dmadev_completed_status;
> >
> > rdpi = &dpivf->rdpi;
> >
> > diff --git a/drivers/dma/cnxk/cnxk_dmadev.h b/drivers/dma/cnxk/cnxk_dmadev.h
> > index 9e0bb7b2ce..efb09af03e 100644
> > --- a/drivers/dma/cnxk/cnxk_dmadev.h
> > +++ b/drivers/dma/cnxk/cnxk_dmadev.h
> > @@ -4,8 +4,39 @@
> > #ifndef _CNXK_DMADEV_H_
> > #define _CNXK_DMADEV_H_
> >
> > +#define DPI_MAX_POINTER 15
> > +#define DPI_QUEUE_STOP 0x0
> > +#define DPI_QUEUE_START 0x1
> > +#define STRM_INC(s) ((s).tail = ((s).tail + 1) % (s).max_cnt)
> > +#define DPI_MAX_DESC DPI_MAX_POINTER
> > +
> > +/* Set Completion data to 0xFF when request submitted,
> > + * upon successful request completion engine reset to completion status
> > + */
> > +#define DPI_REQ_CDATA 0xFF
> > +
> > +struct cnxk_dpi_compl_s {
> > + uint64_t cdata;
> > + void *cb_data;
> > +};
> > +
> > +struct cnxk_dpi_cdesc_data_s {
> > + struct cnxk_dpi_compl_s *compl_ptr[DPI_MAX_DESC];
> > + uint16_t max_cnt;
> > + uint16_t head;
> > + uint16_t tail;
> > +};
> > +
> > +struct cnxk_dpi_conf {
> > + union dpi_instr_hdr_s hdr;
> > + struct cnxk_dpi_cdesc_data_s c_desc;
> > +};
> > +
> > struct cnxk_dpi_vf_s {
> > struct roc_dpi rdpi;
> > + struct cnxk_dpi_conf conf;
> > + uint64_t cmd[DPI_MAX_CMD_SIZE];
> > + uint32_t num_words;
> > };
> >
> > #endif
> > diff --git a/drivers/dma/cnxk/version.map b/drivers/dma/cnxk/version.map
> > new file mode 100644
> > index 0000000000..4a76d1d52d
> > --- /dev/null
> > +++ b/drivers/dma/cnxk/version.map
> > @@ -0,0 +1,3 @@
> > +DPDK_21 {
>
> should be DPDK_22
>
> > + local: *;
> > +};
> >
>
next prev parent reply other threads:[~2021-11-02 18:12 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-10-26 4:12 [dpdk-dev] [PATCH 1/4] common/cnxk: add DPI DMA support Radha Mohan Chintakuntla
2021-10-26 4:12 ` [dpdk-dev] [PATCH 2/4] dma/cnxk: create and initialize dmadev on pci probe Radha Mohan Chintakuntla
2021-10-26 8:36 ` Jerin Jacob
2021-10-26 21:05 ` Radha Mohan
2021-10-26 4:12 ` [dpdk-dev] [PATCH 3/4] dma/cnxk: add dma channel operations Radha Mohan Chintakuntla
2021-10-26 8:41 ` Jerin Jacob
2021-10-28 18:18 ` Radha Mohan
2021-10-29 14:54 ` Jerin Jacob
2021-10-29 18:02 ` Radha Mohan
2021-10-26 4:13 ` [dpdk-dev] [PATCH 4/4] dma/cnxk: add copy_sg function Radha Mohan Chintakuntla
2021-10-26 8:42 ` Jerin Jacob
2021-10-26 8:33 ` [dpdk-dev] [PATCH 1/4] common/cnxk: add DPI DMA support Jerin Jacob
2021-10-26 15:57 ` Radha Mohan
2021-11-02 3:40 ` [dpdk-dev] [PATCH v2 " Radha Mohan Chintakuntla
2021-11-02 3:40 ` [dpdk-dev] [PATCH v2 2/4] dma/cnxk: create and initialize dmadev on pci probe Radha Mohan Chintakuntla
2021-11-02 4:02 ` Jerin Jacob
2021-11-02 11:49 ` fengchengwen
2021-11-02 3:40 ` [dpdk-dev] [PATCH v2 3/4] dma/cnxk: add dma channel operations Radha Mohan Chintakuntla
2021-11-02 11:59 ` fengchengwen
2021-11-02 18:11 ` Radha Mohan [this message]
2021-11-02 3:40 ` [dpdk-dev] [PATCH v2 4/4] dma/cnxk: add copy_sg function Radha Mohan Chintakuntla
2021-11-02 12:02 ` fengchengwen
2021-11-02 11:45 ` [dpdk-dev] [PATCH v2 1/4] common/cnxk: add DPI DMA support fengchengwen
2021-11-03 18:01 ` [dpdk-dev] [PATCH v3 1/5] " Radha Mohan Chintakuntla
2021-11-03 18:01 ` [dpdk-dev] [PATCH v3 2/5] dma/cnxk: create and initialize dmadev on pci probe Radha Mohan Chintakuntla
2021-11-07 20:55 ` Thomas Monjalon
2021-11-07 23:04 ` Thomas Monjalon
2021-11-09 3:52 ` Radha Mohan
2021-11-09 8:11 ` Thomas Monjalon
2021-11-03 18:01 ` [dpdk-dev] [PATCH v3 3/5] dma/cnxk: add dma channel operations Radha Mohan Chintakuntla
2021-11-03 18:01 ` [dpdk-dev] [PATCH v3 4/5] dma/cnxk: add copy_sg function Radha Mohan Chintakuntla
2021-11-03 18:01 ` [dpdk-dev] [PATCH v3 5/5] dma/cnxk: add stats function Radha Mohan Chintakuntla
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=CAC8NTUUrTpArDJwYkJEUTxzFqxCx5dZ5rR+gpoXeVtjp-ZH0Zw@mail.gmail.com \
--to=mohun106@gmail.com \
--cc=dev@dpdk.org \
--cc=fengchengwen@huawei.com \
--cc=jerinj@marvell.com \
--cc=kirankumark@marvell.com \
--cc=ndabilpuram@marvell.com \
--cc=radhac@marvell.com \
--cc=sburla@marvell.com \
--cc=skori@marvell.com \
--cc=skoteshwar@marvell.com \
--cc=thomas@monjalon.net \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).