From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-ed1-f65.google.com (mail-ed1-f65.google.com [209.85.208.65]) by dpdk.org (Postfix) with ESMTP id 679EA1B52B for ; Thu, 4 Oct 2018 19:59:25 +0200 (CEST) Received: by mail-ed1-f65.google.com with SMTP id y20-v6so2725413eds.10 for ; Thu, 04 Oct 2018 10:59:25 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=netronome-com.20150623.gappssmtp.com; s=20150623; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=/O02YL1eOt+k2SJVJvNLIdQ6PjjhKURCexsNBcFDaGA=; b=M8Y1QTbBqBds4ByrERRLIT4LJtlBdjbd1fm74PQ1tGNd91a6lDpbBHxAIaVFfnYkyO xpTUXBO8VDKqucrUvWSNpuG9fNiQcJvKFRxNuHTnW4nTw4mKQs5fu0TRzpBRQxLDAzZ9 ANou/pYCZcnfNvJUuwpenB0X8mCBmCDTePVw1aqUSbTlm27e42c9OZQo2PZI/FYa7A6Z Q2XGtFp6stPgW4KU2bkBOL8WZWYFaEc5gZFcbY73zzX48fR7vlof9oq2JlrDd6S4Dcot PzFopS9/zPZYHvZFnkDaVpAmNrgpepK0kruIl7aCC+1FZ8zKSODt2SuLdTrpq94Y/LI/ j+dQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=/O02YL1eOt+k2SJVJvNLIdQ6PjjhKURCexsNBcFDaGA=; b=l0KbhfBJ0it7935DF2sJHPBqOe+PAmXNKL3LQo5gNFEzCUoG6l5/5dL7mLN1OIxT0H YUec9vEX+f7QL0gFYyjYnbB7UDWz8EMzbvNv4G1THA8UF8EiDHOmUCSNmrBPeacoQhpw p1qwrbKfAFjqJthOdrksn4/nhvVdfqZQcdlg84Ut+2VZ91NMtAzOLNy25aUPu4hR3ELz WN/GJtKDNkYjl6LOXfk8h8H+Vwk4OZsBKj3CDAA8MtVEfIWttLiGjbEByG8rADXRk2i5 4odpIQXdnCNH4YBUkTK5ox2iJNPz/CGEXeto8eq/mFOdFVqOSE8hMV6ELyJnLeUShXmw p7tA== X-Gm-Message-State: ABuFfoimcQvdxuVvaXULJmPfDYGD/AGlRdhTGJSYUkZujOiWvwUxlOx1 KOMAVwcMhYAewLbQTunIB8kUmBN10TAky1A5wOls0Q== X-Google-Smtp-Source: ACcGV63AQfGX5MfEJAfN6rRnUvhBaPnvl8JWw7NP5spp7KF45S/b4tEGeLR6dFBzFMen1kSFni2l9hfeh8kfZwO6KfM= X-Received: by 2002:a50:a564:: with SMTP id z33-v6mr9663574edb.166.1538675965092; Thu, 04 Oct 2018 10:59:25 -0700 (PDT) MIME-Version: 1.0 References: <1535719857-19092-1-git-send-email-alejandro.lucero@netronome.com> <1535719857-19092-4-git-send-email-alejandro.lucero@netronome.com> <6b0b9159-d25b-56aa-0ca0-dd61b5206b04@intel.com> In-Reply-To: From: Alejandro Lucero Date: Thu, 4 Oct 2018 18:59:14 +0100 Message-ID: To: "Burakov, Anatoly" Cc: dev , Maxime Coquelin Content-Type: text/plain; charset="UTF-8" X-Content-Filtered-By: Mailman/MimeDel 2.1.15 Subject: Re: [dpdk-dev] [PATCH v2 3/5] bus/pci: use IOVAs check when setting IOVA mode X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 04 Oct 2018 17:59:25 -0000 On Thu, Oct 4, 2018 at 4:49 PM Burakov, Anatoly wrote: > On 04-Oct-18 2:35 PM, Alejandro Lucero wrote: > > > > > > On Wed, Oct 3, 2018 at 1:56 PM Burakov, Anatoly > > > wrote: > > > > On 31-Aug-18 1:50 PM, Alejandro Lucero wrote: > > > Although VT-d emulation currently only supports 39 bits, it could > > > be iovas being within that supported range. This patch allows > > > IOVA mode in such a case. > > > > > > Indeed, memory initialization code can be modified for using lower > > > virtual addresses than those used by the kernel for 64 bits > processes > > > by default, and therefore memsegs iovas can use 39 bits or less > for > > > most system. And this is likely 100% true for VMs. > > > > > > Signed-off-by: Alejandro Lucero > > > > > --- > > > drivers/bus/pci/linux/pci.c | 15 ++++++++++----- > > > 1 file changed, 10 insertions(+), 5 deletions(-) > > > > > > diff --git a/drivers/bus/pci/linux/pci.c > > b/drivers/bus/pci/linux/pci.c > > > index 04648ac..215dc10 100644 > > > --- a/drivers/bus/pci/linux/pci.c > > > +++ b/drivers/bus/pci/linux/pci.c > > > @@ -588,10 +588,11 @@ > > > fclose(fp); > > > > > > mgaw = ((vtd_cap_reg & VTD_CAP_MGAW_MASK) >> > > VTD_CAP_MGAW_SHIFT) + 1; > > > - if (mgaw < X86_VA_WIDTH) > > > - return false; > > > > > > - return true; > > > + if (!rte_eal_check_dma_mask(mgaw)) > > > + return true; > > > + else > > > + return false; > > > > return rte_eal_check_dma_mask(mgaw) == 0; ? > > > > > > I guess that works and is more elegant. > > Thanks. > > > > > > > } > > > #elif defined(RTE_ARCH_PPC_64) > > > static bool > > > @@ -615,13 +616,17 @@ > > > { > > > struct rte_pci_device *dev = NULL; > > > struct rte_pci_driver *drv = NULL; > > > + int iommu_dma_mask_check_done = 0; > > > > > > FOREACH_DRIVER_ON_PCIBUS(drv) { > > > FOREACH_DEVICE_ON_PCIBUS(dev) { > > > if (!rte_pci_match(drv, dev)) > > > continue; > > > - if (!pci_one_device_iommu_support_va(dev)) > > > - return false; > > > + if (!iommu_dma_mask_check_done) { > > > + if > > (!pci_one_device_iommu_support_va(dev)) > > > + return false; > > > + iommu_dma_mask_check_done = 1; > > > + } > > > } > > > > The commit message doesn't explain why are we only checking a single > > device. Indeed, i am not 100% clear as to why, so some explanation in > > the commit message and preferably a comment in code would be more > than > > welcome :) > > > > > > Because the pci_one_device_iommu_support_va function does always the > > same whatever the device is used in the call. > > So, this code was always wrong and needlessly checked each device when > it could've checked it a single time? OK, that makes it a bit clearer. > Still, needs to be documented in comments/commit message :) The commit > message IMO looks quite irrelevant to what happens in the commit. It > almost feels like this commit should be split in two - first change the > mgaw check, and then fix the PCI bus code to not check needlessly. > > Ok. Maybe that's better. I will do that in next version. Thanks > -- > Thanks, > Anatoly >