From: David Marchand <david.marchand@redhat.com>
To: Junfeng Guo <junfeng.guo@intel.com>
Cc: qi.z.zhang@intel.com, jingjing.wu@intel.com,
ferruh.yigit@xilinx.com, beilei.xing@intel.com, dev@dpdk.org,
xiaoyun.li@intel.com, awogbemila@google.com,
bruce.richardson@intel.com, hemant.agrawal@nxp.com,
stephen@networkplumber.org, chenbo.xia@intel.com,
helin.zhang@intel.com
Subject: Re: [PATCH] net/gve: fix meson build failure on non-Linux platforms
Date: Wed, 26 Oct 2022 10:51:41 +0200 [thread overview]
Message-ID: <CAJFAV8w8udnLnRZxiRt0+8KKrrfMpk1J_ykODPG+Gotv1Do5dw@mail.gmail.com> (raw)
In-Reply-To: <20221026084244.22083-1-junfeng.guo@intel.com>
On Wed, Oct 26, 2022 at 10:44 AM Junfeng Guo <junfeng.guo@intel.com> wrote:
>
> Meson build may fail on FreeBSD with gcc and clang, due to missing
> the header file linux/pci_regs.h on non-Linux platform. Thus, in
> this patch, we removed the file include and added the used Macros
> derived from linux/pci_regs.h.
>
> Fixes: 3047a5ac8e66 ("net/gve: add support for device initialization")
> Cc: stable@dpdk.org
...
No need for Cc: stable.
>
> Signed-off-by: Junfeng Guo <junfeng.guo@intel.com>
> ---
> drivers/net/gve/gve_ethdev.c | 14 +++++++++++++-
> 1 file changed, 13 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/net/gve/gve_ethdev.c b/drivers/net/gve/gve_ethdev.c
> index b0f7b98daa..e968317737 100644
> --- a/drivers/net/gve/gve_ethdev.c
> +++ b/drivers/net/gve/gve_ethdev.c
> @@ -1,12 +1,24 @@
> /* SPDX-License-Identifier: BSD-3-Clause
> * Copyright(C) 2022 Intel Corporation
> */
> -#include <linux/pci_regs.h>
>
> #include "gve_ethdev.h"
> #include "base/gve_adminq.h"
> #include "base/gve_register.h"
>
> +/*
> + * Following macros are derived from linux/pci_regs.h, however,
> + * we can't simply include that header here, as there is no such
> + * file for non-Linux platform.
> + */
> +#define PCI_CFG_SPACE_SIZE 256
> +#define PCI_CAPABILITY_LIST 0x34 /* Offset of first capability list entry */
> +#define PCI_STD_HEADER_SIZEOF 64
> +#define PCI_CAP_SIZEOF 4
> +#define PCI_CAP_ID_MSIX 0x11 /* MSI-X */
> +#define PCI_MSIX_FLAGS 2 /* Message Control */
> +#define PCI_MSIX_FLAGS_QSIZE 0x07FF /* Table size */
No, don't introduce such defines in a driver.
We have a PCI library, that provides some defines.
So fix your driver to use them.
--
David Marchand
next prev parent reply other threads:[~2022-10-26 8:51 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-10-26 8:42 Junfeng Guo
2022-10-26 8:51 ` David Marchand [this message]
2022-10-26 9:10 ` Ferruh Yigit
2022-10-26 9:33 ` David Marchand
2022-10-26 10:01 ` Ferruh Yigit
2022-10-26 10:24 ` Guo, Junfeng
2022-10-26 10:05 ` Gao, DaxueX
2022-10-26 10:23 ` [PATCH v2] " Junfeng Guo
2022-10-26 11:11 ` Ferruh Yigit
2022-10-27 3:08 ` Gao, DaxueX
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