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References: <20190903105938.33231-1-jerinj@marvell.com>
<20190903105938.33231-8-jerinj@marvell.com>
In-Reply-To: <20190903105938.33231-8-jerinj@marvell.com>
From: David Marchand <david.marchand@redhat.com>
Date: Fri, 18 Oct 2019 15:16:51 +0200
Message-ID: <CAJFAV8yyRrRnOfNS64jtdSaQqDoiXs0uRt4A-hEC+3v5--jGKQ@mail.gmail.com>
To: Jerin Jacob Kollanukkaran <jerinj@marvell.com>,
Thomas Monjalon <thomas@monjalon.net>
Cc: dev <dev@dpdk.org>, "Ananyev, Konstantin" <konstantin.ananyev@intel.com>,
Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>,
Gavin Hu <gavin.hu@arm.com>
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Subject: Re: [dpdk-dev] [PATCH 7/8] bpf/arm64: add atomic-exchange-and-add
operation
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On Tue, Sep 3, 2019 at 1:00 PM <jerinj@marvell.com> wrote:
>
> From: Jerin Jacob <jerinj@marvell.com>
>
> Implement XADD eBPF instruction using STADD arm64 instruction.
> If the given platform does not have atomics support,
> use LDXR and STXR pair for critical section instead of STADD.
For the record, this patch had a missed dependency on the 128-bits
atomic for arm64 patch because of RTE_ARM_FEATURE_ATOMICS.
This will be resolved once the latter is merged.
> ---
> lib/librte_bpf/bpf_jit_arm64.c | 85 +++++++++++++++++++++++++++++++++-
> 1 file changed, 84 insertions(+), 1 deletion(-)
>
> diff --git a/lib/librte_bpf/bpf_jit_arm64.c b/lib/librte_bpf/bpf_jit_arm6=
4.c
> index c797c9c62..62fa6a505 100644
> --- a/lib/librte_bpf/bpf_jit_arm64.c
> +++ b/lib/librte_bpf/bpf_jit_arm64.c
[snip]
> +static int
> +has_atomics(void)
> +{
> + int rc =3D 0;
> +
> +#if defined(__ARM_FEATURE_ATOMICS) || defined(RTE_ARM_FEATURE_ATOMICS)
> + rc =3D 1;
> +#endif
> + return rc;
> +}
[snip]
--=20
David Marchand