On Tue, 1 Jul 2025, 20:21 , <uk7b@foxmail.com> wrote:

> From: Sun Yuechi <sunyuechi@iscas.ac.cn>
>
> Support using -Dcpu_instruction_set=rv64gcv to enable V extension.
>
> Signed-off-by: Sun Yuechi <sunyuechi@iscas.ac.cn>
>
Reviewed-by: Stanisław Kardach <stanislaw.kardach@gmail.com>

> ---
>  config/riscv/meson.build | 16 +++++++++-------
>  1 file changed, 9 insertions(+), 7 deletions(-)
>
> diff --git a/config/riscv/meson.build b/config/riscv/meson.build
> index e3694cf2e6..f93ea3e145 100644
> --- a/config/riscv/meson.build
> +++ b/config/riscv/meson.build
> @@ -111,13 +111,15 @@ arch_config = arch_config[arch_id]
>  # Concatenate flags respecting priorities.
>  dpdk_flags = flags_common + vendor_config['flags'] +
> arch_config.get('flags', [])
>
> -# apply supported machine args
> -machine_args = [] # Clear previous machine args
> -foreach flag: arch_config['machine_args']
> -    if cc.has_argument(flag)
> -        machine_args += flag
> -    endif
> -endforeach
> +if (cpu_instruction_set == 'rv64gc')
> +    # apply supported machine args
> +    machine_args = [] # Clear previous machine args
> +    foreach flag: arch_config['machine_args']
> +        if cc.has_argument(flag)
> +            machine_args += flag
> +        endif
> +    endforeach
> +endif
>
>  # check if we can do buildtime detection of extensions supported by the
> target
>  riscv_extension_macros = false
> --
> 2.50.0
>
>