From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-oa0-f41.google.com (mail-oa0-f41.google.com [209.85.219.41]) by dpdk.org (Postfix) with ESMTP id DB2E336D for ; Mon, 30 Jun 2014 12:00:32 +0200 (CEST) Received: by mail-oa0-f41.google.com with SMTP id l6so8681639oag.0 for ; Mon, 30 Jun 2014 03:00:52 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:date:message-id:subject:from:to :content-type; bh=B79z4W7FX8QiU99GoH3tD27LsgD25GZr32/KqT5qpMQ=; b=Yg1HDfqXk0JU9sMnJooOSg5IUIA6FxBg6u/YZ7O5Aih86JM8l9QulBDZwb7Wt0MDG6 cT2jSHXouPMaTAELNOkTgt/IEx/3seHGKsLyYSj+lcI3jNigtTDzpuatxsFRv6K0y7Yb 1qWiH2Jy5/No4UFS2/ee+u2xu2hZGnMCBA9Grvi+fBoyFOeWbdXsJG7OW4F5Jxf0kEGb xT0HovzBfhG5iAVeEG6oz6XXGXV5vV973qHSTX+0CuLxAHvOoDJicZRRAaLpDDKlMQ9w K0LiczoP0QJtjzX8FZl1tgBMk+YlkzxlCT67aAsV/kmvCVMp4686qV2UWQBwZe8wGCBg KgNA== X-Gm-Message-State: ALoCoQke14GZddBx93RCoAJPcnEnroKep5cvNTatMcS8Jk8NDQm9cs+GH6Vkmt6hJQqAF+Mtolxh MIME-Version: 1.0 X-Received: by 10.60.129.161 with SMTP id nx1mr40806194oeb.28.1404122452059; Mon, 30 Jun 2014 03:00:52 -0700 (PDT) Received: by 10.202.202.137 with HTTP; Mon, 30 Jun 2014 03:00:52 -0700 (PDT) Date: Mon, 30 Jun 2014 13:00:52 +0300 Message-ID: From: Alex Markuze To: dev@dpdk.org Content-Type: text/plain; charset=UTF-8 X-Content-Filtered-By: Mailman/MimeDel 2.1.15 Subject: [dpdk-dev] Memory Pinning. X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 30 Jun 2014 10:00:33 -0000 Hi, Guys. I have several newbie questions about the DPDK design I was hoping some one could answer. Both in the RX and TX flow, the Buffer Memory must be pinned and not swappable. In RDMA, memory is explicitly registered and made pinned (to the limit defined @ /etc/security/limits.conf) .With regular sockets/kernel driver the NIC DMA's the buffer from/to the kernel which are by definition un swappable. So I'm guessing that at least the TX/RX buffers are mapped to kernel space. My questions are 1. How are the buffers made unswappable ? Are they shared with the kernel 2. When and Which buffers are mapped/unmapped to the kernel space. 3. When are the buffers DMA mapped and by whom? And another "bonus" Question. On TX flow I didn't find a way to receive a send completion. So how Can I know when its safe to modify the sent buffers (besides of waiting for the ring buffer to complete a full circle)? Thanks. Alex.