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From: Igor Gutorov <igootorov@gmail.com>
Date: Thu, 10 Oct 2024 12:06:50 +0300
Message-ID: <CAL7bPf3U4y+U3EvD_4GP2QAQMMoBJOV9V0pDTq=wHFzOjywYVg@mail.gmail.com>
Subject: Re: [PATCH 1/1] net/mlx5: show rx/tx descriptor ring limitations in
 rte_eth_dev_info
To: Stephen Hemminger <stephen@networkplumber.org>
Cc: Slava Ovsiienko <viacheslavo@nvidia.com>,
 Dariusz Sosnowski <dsosnowski@nvidia.com>, 
 Ori Kam <orika@nvidia.com>, Suanming Mou <suanmingm@nvidia.com>,
 Matan Azrad <matan@nvidia.com>, "dev@dpdk.org" <dev@dpdk.org>
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Hi Stephen,

On Thu, Oct 10, 2024 at 3:18=E2=80=AFAM Stephen Hemminger
<stephen@networkplumber.org> wrote:
>
> On Mon, 17 Jun 2024 07:18:58 +0000
> Slava Ovsiienko <viacheslavo@nvidia.com> wrote:
>
> > Hi, Igor
> >
> > Thank you for the patch.
> >
> > 1. The absolute max descriptor number supported by ConnectX hardware is=
 32768.
> > 2. The actual max descriptor number supported by the port (and its rela=
ted representors)
> >     reported in log_max_wq_sz in HCA.caps.  This value should be querie=
d and save in mlx5_devx_cmd_query_hca_attr() routine.
> > 3. mlx5_rx_queue_pre_setup() should check requested descriptor number a=
nd reject if it exceeds log_max_wq_sz
> > 4. Please, format your patch according to the "fix" template.
> >
> > With best regards,
> > Slava
>
>
> Marking this patch as Changes Requested.
> Yes, this comment expands the scope of the original patch; but if this pa=
rt of the mlx5
> is going to change, might as well get it right.

I'm new to DPDK development, but if it makes sense, I guess this can
be marked as "Canceled" (or something like that).
There's a v2 of this patch [1], and a v3 [2]. You've left some
suggestions on v2, so I'm going to send a v4.

[1]: https://lore.kernel.org/all/20241009171853.77e8dce7@hermes.local/T/#me=
cef40b9e98711313e4189d42b0d50676e6d9e5e
[2]: https://lore.kernel.org/all/20241009171853.77e8dce7@hermes.local/T/#md=
042e15b4642df69127b023144948681b3072af5

--
Igor