From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 31ED3A04A4; Wed, 19 Jan 2022 10:02:21 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 1CCC340E50; Wed, 19 Jan 2022 10:02:21 +0100 (CET) Received: from mail-il1-f181.google.com (mail-il1-f181.google.com [209.85.166.181]) by mails.dpdk.org (Postfix) with ESMTP id BBE254013F for ; Wed, 19 Jan 2022 10:02:19 +0100 (CET) Received: by mail-il1-f181.google.com with SMTP id d3so1585867ilr.10 for ; Wed, 19 Jan 2022 01:02:19 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=8YLZmcsM0GxZ9URlCCy1jYcHelAhYnZnE002C+Zo6k0=; b=LZkWAb07pJ1hoDT0ZgqLZHtSNgvvrGSZ7970gOjrPV0eyQ+W2TTac9yVWdtsTrzeCs xNY4/69T0KBve+di096cDE7DZjP0OyrmnRJR6oFcx7Wkup6YT92zCjFgkvvIJIXvZZYo dV+TiK6Ux8l+RFgcfGqRfAZrQNBRciC9Ix9yac3whxAsfnbito/+uezDa/Vmdo+xTweU 2hLB7bH/dQDCXxRXViHRuBrwSxgBedyQzW+yr04X9K/3cpO0uJNGDHkilwCCrPVlJPK8 DzJDLOR7elooe3wbTEq9EHc0Nb8nuE2EEhgNyeCYKWPXQp3juvPDFDnYAz+87Yi423xp 6X6Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=8YLZmcsM0GxZ9URlCCy1jYcHelAhYnZnE002C+Zo6k0=; b=1oROTxmpgb5zwULvw1jgh8rzh+a3AzLJRnPYH2UL5cDU9eqk7CZIJRW38pzlNMr6PT 7OLNLwYtEsgqgKa78w3pvRoyRojyXk0q0jo4wEUWwTrs96T4onfGNbC0Eo9+Lxw05HNJ hOX2/lcRg1ATEMBkZbaraI8EUgUnviCwVXHELt4GZ3eouVI3GQyn0W8Ynq/heQ2UK/+F q5R74/VSGtsyPZMncGh7iIzp3VFgu44Xd2/jXFBr5RuuAXfizb+DuOvvYg5j0k3T2ZIJ TS2pPe/tbs4b8kgC62LKSpPc7vzvLG7MncR1ikyGQeB1mR7mb2R+yw8YjHvlc4zAk2qB 2qYg== X-Gm-Message-State: AOAM531qZuv9PMh7cXRGhsXrfJ12fpIw+mF20BRtpKlRjaQ4pPiIkxLd suAb5h+/wV8BJ0FKRw1JImPIVpW0ypNTzNIWjXt+ih6BsQSmwA== X-Google-Smtp-Source: ABdhPJxeJfhMfGId3nt7h//RfxpJSHMq8vT09E9ILt9HLCTTRNruCMemU0WmJKyWyF1XpOVUbFTPbt+0Blu2mIEiSUs= X-Received: by 2002:a05:6e02:1b08:: with SMTP id i8mr5990929ilv.262.1642582939078; Wed, 19 Jan 2022 01:02:19 -0800 (PST) MIME-Version: 1.0 References: <20211203163627.3254236-1-rbhansali@marvell.com> <20211203163627.3254236-2-rbhansali@marvell.com> In-Reply-To: <20211203163627.3254236-2-rbhansali@marvell.com> From: Jerin Jacob Date: Wed, 19 Jan 2022 14:31:51 +0530 Message-ID: Subject: Re: [PATCH 2/2] net/cnxk: ethdev Rx/Tx queue status callbacks To: Rahul Bhansali Cc: dpdk-dev , Nithin Dabilpuram , Kiran Kumar K , Sunil Kumar Kori , Satha Rao , Jerin Jacob Content-Type: text/plain; charset="UTF-8" X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org On Fri, Dec 3, 2021 at 10:06 PM Rahul Bhansali wrote: > > Provides ethdev callback support of rx_queue_count, > rx_descriptor_status and tx_descriptor_status. > > Signed-off-by: Rahul Bhansali Missed to update doc/guides/nics/features/cnxk* for "Rx descriptor status" and "Tx descriptor status". Rest looks good to me. Please send the next version. > --- > drivers/net/cnxk/cnxk_ethdev.c | 3 ++ > drivers/net/cnxk/cnxk_ethdev.h | 5 +++ > drivers/net/cnxk/cnxk_ethdev_ops.c | 60 ++++++++++++++++++++++++++++++ > 3 files changed, 68 insertions(+) > > diff --git a/drivers/net/cnxk/cnxk_ethdev.c b/drivers/net/cnxk/cnxk_ethdev.c > index 74f625553d..183fd241d8 100644 > --- a/drivers/net/cnxk/cnxk_ethdev.c > +++ b/drivers/net/cnxk/cnxk_ethdev.c > @@ -1595,6 +1595,9 @@ cnxk_eth_dev_init(struct rte_eth_dev *eth_dev) > int rc, max_entries; > > eth_dev->dev_ops = &cnxk_eth_dev_ops; > + eth_dev->rx_queue_count = cnxk_nix_rx_queue_count; > + eth_dev->rx_descriptor_status = cnxk_nix_rx_descriptor_status; > + eth_dev->tx_descriptor_status = cnxk_nix_tx_descriptor_status; > > /* Alloc security context */ > sec_ctx = plt_zmalloc(sizeof(struct rte_security_ctx), 0); > diff --git a/drivers/net/cnxk/cnxk_ethdev.h b/drivers/net/cnxk/cnxk_ethdev.h > index 5bfda3d815..43814a81fc 100644 > --- a/drivers/net/cnxk/cnxk_ethdev.h > +++ b/drivers/net/cnxk/cnxk_ethdev.h > @@ -559,6 +559,11 @@ void cnxk_nix_rxq_info_get(struct rte_eth_dev *eth_dev, uint16_t qid, > void cnxk_nix_txq_info_get(struct rte_eth_dev *eth_dev, uint16_t qid, > struct rte_eth_txq_info *qinfo); > > +/* Queue status */ > +int cnxk_nix_rx_descriptor_status(void *rxq, uint16_t offset); > +int cnxk_nix_tx_descriptor_status(void *txq, uint16_t offset); > +uint32_t cnxk_nix_rx_queue_count(void *rxq); > + > /* Lookup configuration */ > const uint32_t *cnxk_nix_supported_ptypes_get(struct rte_eth_dev *eth_dev); > void *cnxk_nix_fastpath_lookup_mem_get(void); > diff --git a/drivers/net/cnxk/cnxk_ethdev_ops.c b/drivers/net/cnxk/cnxk_ethdev_ops.c > index ce5f1f7240..1255d6b40f 100644 > --- a/drivers/net/cnxk/cnxk_ethdev_ops.c > +++ b/drivers/net/cnxk/cnxk_ethdev_ops.c > @@ -694,6 +694,66 @@ cnxk_nix_txq_info_get(struct rte_eth_dev *eth_dev, uint16_t qid, > memcpy(&qinfo->conf, &txq_sp->qconf.conf.tx, sizeof(qinfo->conf)); > } > > +uint32_t > +cnxk_nix_rx_queue_count(void *rxq) > +{ > + struct cnxk_eth_rxq_sp *rxq_sp = cnxk_eth_rxq_to_sp(rxq); > + struct roc_nix *nix = &rxq_sp->dev->nix; > + uint32_t head, tail; > + > + roc_nix_cq_head_tail_get(nix, rxq_sp->qid, &head, &tail); > + return (tail - head) % (rxq_sp->qconf.nb_desc); > +} > + > +static inline int > +nix_offset_has_packet(uint32_t head, uint32_t tail, uint16_t offset, bool is_rx) > +{ > + /* Check given offset(queue index) has packet filled/xmit by HW > + * in case of Rx or Tx. > + * Also, checks for wrap around case. > + */ > + return ((tail > head && offset <= tail && offset >= head) || > + (head > tail && (offset >= head || offset <= tail))) ? > + is_rx : > + !is_rx; > +} > + > +int > +cnxk_nix_rx_descriptor_status(void *rxq, uint16_t offset) > +{ > + struct cnxk_eth_rxq_sp *rxq_sp = cnxk_eth_rxq_to_sp(rxq); > + struct roc_nix *nix = &rxq_sp->dev->nix; > + uint32_t head, tail; > + > + if (rxq_sp->qconf.nb_desc <= offset) > + return -EINVAL; > + > + roc_nix_cq_head_tail_get(nix, rxq_sp->qid, &head, &tail); > + > + if (nix_offset_has_packet(head, tail, offset, 1)) > + return RTE_ETH_RX_DESC_DONE; > + else > + return RTE_ETH_RX_DESC_AVAIL; > +} > + > +int > +cnxk_nix_tx_descriptor_status(void *txq, uint16_t offset) > +{ > + struct cnxk_eth_txq_sp *txq_sp = cnxk_eth_txq_to_sp(txq); > + struct roc_nix *nix = &txq_sp->dev->nix; > + uint32_t head = 0, tail = 0; > + > + if (txq_sp->qconf.nb_desc <= offset) > + return -EINVAL; > + > + roc_nix_sq_head_tail_get(nix, txq_sp->qid, &head, &tail); > + > + if (nix_offset_has_packet(head, tail, offset, 0)) > + return RTE_ETH_TX_DESC_DONE; > + else > + return RTE_ETH_TX_DESC_FULL; > +} > + > /* It is a NOP for cnxk as HW frees the buffer on xmit */ > int > cnxk_nix_tx_done_cleanup(void *txq, uint32_t free_cnt) > -- > 2.25.1 >