From: Jerin Jacob <jerinjacobk@gmail.com>
To: Ruifeng Wang <Ruifeng.Wang@arm.com>,
Ferruh Yigit <ferruh.yigit@intel.com>,
Thomas Monjalon <thomas@monjalon.net>
Cc: "pbhagavatula@marvell.com" <pbhagavatula@marvell.com>,
"jerinj@marvell.com" <jerinj@marvell.com>,
Jan Viktorin <viktorin@rehivetech.com>,
Bruce Richardson <bruce.richardson@intel.com>,
"dev@dpdk.org" <dev@dpdk.org>, nd <nd@arm.com>
Subject: Re: [PATCH] config/cn10k: align mempool elements to 128 bytes
Date: Fri, 21 Jan 2022 15:07:43 +0530 [thread overview]
Message-ID: <CALBAE1MBXTOaW7rvSCtk2sS930J1RsqArsQenMaiWKeKpmR2QQ@mail.gmail.com> (raw)
In-Reply-To: <CALBAE1Pu1hPvYnCMtqp4=XWJnHPcbHUFhx-2fi7wFD+dC68L9g@mail.gmail.com>
On Thu, Jan 20, 2022 at 3:21 PM Jerin Jacob <jerinjacobk@gmail.com> wrote:
>
> On Tue, Dec 14, 2021 at 2:53 PM Ruifeng Wang <Ruifeng.Wang@arm.com> wrote:
> >
> > > -----Original Message-----
> > > From: pbhagavatula@marvell.com <pbhagavatula@marvell.com>
> > > Sent: Monday, December 13, 2021 7:06 PM
> > > To: jerinj@marvell.com; Jan Viktorin <viktorin@rehivetech.com>; Ruifeng
> > > Wang <Ruifeng.Wang@arm.com>; Bruce Richardson
> > > <bruce.richardson@intel.com>
> > > Cc: dev@dpdk.org; Pavan Nikhilesh <pbhagavatula@marvell.com>
> > > Subject: [PATCH] config/cn10k: align mempool elements to 128 bytes
> > >
> > > From: Pavan Nikhilesh <pbhagavatula@marvell.com>
> > >
> > > Mempool elements are by default aligned to CACHELINE_SIZE.
> > > In CN10K cacheline size is 64B but the RoC requires buffers to be aligned to
> > > 128B.
> > > Set RTE_MEMPOOL_ALIGN to 128 to force mempool buffers to be aligned
> > > 128 bytes.
> > >
> > > Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
> > > ---
> > > config/arm/meson.build | 3 ++-
> > > 1 file changed, 2 insertions(+), 1 deletion(-)
> > >
> > > diff --git a/config/arm/meson.build b/config/arm/meson.build index
> > > 213324d262..33afe1a9ad 100644
> > > --- a/config/arm/meson.build
> > > +++ b/config/arm/meson.build
> > > @@ -276,7 +276,8 @@ soc_cn10k = {
> > > 'implementer' : '0x41',
> > > 'flags': [
> > > ['RTE_MAX_LCORE', 24],
> > > - ['RTE_MAX_NUMA_NODES', 1]
> > > + ['RTE_MAX_NUMA_NODES', 1],
> > > + ['RTE_MEMPOOL_ALIGN', 128]
> > > ],
> > > 'part_number': '0xd49',
> > > 'extra_march_features': ['crypto'],
> > > --
> > > 2.17.1
> >
> > Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
>
> Applied to dpdk-next-net-mrvl/for-next-net. Thanks
As per @Ferruh Yigit suggestion, This patch will be taken through the
main tree.
I changed state as New and Delegate as @Thomas Monjalon for this patch in pw.
>
>
> Added
> Fixes: 1b4c86a721c9 ("config/arm: add Marvell CN10K")
> Cc: stable@dpdk.org
> >
next prev parent reply other threads:[~2022-01-21 9:38 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-12-13 11:06 pbhagavatula
2021-12-14 9:23 ` Ruifeng Wang
2022-01-20 9:51 ` Jerin Jacob
2022-01-21 9:37 ` Jerin Jacob [this message]
2022-02-12 14:14 ` Thomas Monjalon
2021-12-14 10:30 ` Kevin Traynor
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