From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id D63EFA0C51; Thu, 10 Jun 2021 08:40:59 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 487D14067C; Thu, 10 Jun 2021 08:40:59 +0200 (CEST) Received: from mail-io1-f43.google.com (mail-io1-f43.google.com [209.85.166.43]) by mails.dpdk.org (Postfix) with ESMTP id 767024003C for ; Thu, 10 Jun 2021 08:40:57 +0200 (CEST) Received: by mail-io1-f43.google.com with SMTP id k5so15810205iow.12 for ; Wed, 09 Jun 2021 23:40:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=sy608TPgyhgYvTHAsrV86uxgY1dmRqhBYoFhvkfLrRk=; b=FFGkYvb1NYtL7dCOFKAut6OE7AM+gm+vEtPUb/CD39foOx28aRVxOm0J2SlgqJdQWM bpS40FNFsj2zwfxxnCtNS9hA2wBS3tRXgKjqrxZxDU2mr54vWKdrbhi2ohLgHJ4SuLFG Gks1a2T3/htKYR+O1swfHo4ZR0d3h8J0T2f+fPp0H3brzGsxJlXkYPVETHtsXy3vRt8+ Fm43RfRhy6oFUx/FYxhLu6U/RvrDZgMpq09ZuolT6rupYze2s1lq07Nyb9HceqiEFWQo AOZk4U54o79qtwaljSlDJO8rk2tBrNN1f0HP+nMAMt3101aSS9ZnKnH9CTBYT1xbRJ7e iy3Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=sy608TPgyhgYvTHAsrV86uxgY1dmRqhBYoFhvkfLrRk=; b=MLhy+IczkxKTVlN+VrTCngTTR1ydOk5qQsmdkGytmA0nISLsY6sd9xzQbXk0PkUvIM 27N1fYtZEqh26IBM4TAPMVeSgl98bRqA8cl4ZIBofPq72V/L4/f+JJS4UH/Zj8QDDav9 7erH5+pfvGQZyW/HGQtUQa7mOA0ZjaWbJk43MlGojKfRNBEs7eE/qeFtcHFnzWpYeHxL smbSO5yqPAiDgMsmGgkqT1Rc/WfxRcOcb7qm6CrtNKBR9DUpCd2ywrX0Am8cow8nEDDW GMvXa+V8jJQhcXOWhNCanUdv+nnil2ebscKRaKJ5+E7qaZ1ISN+DwgFqbpP8ijh9E9pJ fMkA== X-Gm-Message-State: AOAM533xS56xd54Jb2NneIBYSlJ9PawjfElDJuVy/HjEoEsdK/8SQZUh XahpI9+D8OPnefvbySxfCwQeM7XKQaAr773/1PY= X-Google-Smtp-Source: ABdhPJx6hMJo1qyDl+lhpTaS1ejeei+uBUC6FyQTk2KNt4AXNCgozhWPEyqdCnbOrmjJcF7AbpZ/Rx1FEGvyfMlT2v0= X-Received: by 2002:a6b:8f83:: with SMTP id r125mr2602297iod.123.1623307256621; Wed, 09 Jun 2021 23:40:56 -0700 (PDT) MIME-Version: 1.0 References: <20210531214142.30167-1-tduszynski@marvell.com> <20210531214142.30167-10-tduszynski@marvell.com> In-Reply-To: <20210531214142.30167-10-tduszynski@marvell.com> From: Jerin Jacob Date: Thu, 10 Jun 2021 12:10:40 +0530 Message-ID: To: Tomasz Duszynski Cc: dpdk-dev , jpalider@marvell.com, Jerin Jacob , Thomas Monjalon , Ray Kinsella , Neil Horman , Anatoly Burakov Content-Type: text/plain; charset="UTF-8" Subject: Re: [dpdk-dev] [PATCH 09/28] raw/cnxk_bphy: add bphy cgx/rpm skeleton driver X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" On Tue, Jun 1, 2021 at 3:13 AM Tomasz Duszynski wrote: > > Add baseband phy cgx/rpm skeleton driver. At this point > it merely probes a matching device. > > Signed-off-by: Tomasz Duszynski > Signed-off-by: Jakub Palider > --- > MAINTAINERS | 5 + > doc/guides/rawdevs/cnxk_bphy.rst | 50 +++++++++ > doc/guides/rawdevs/index.rst | 1 + > drivers/raw/cnxk_bphy/cnxk_bphy_cgx.c | 151 ++++++++++++++++++++++++++ > drivers/raw/cnxk_bphy/meson.build | 8 ++ > drivers/raw/cnxk_bphy/version.map | 3 + > drivers/raw/meson.build | 1 + > usertools/dpdk-devbind.py | 4 +- > 8 files changed, 222 insertions(+), 1 deletion(-) > create mode 100644 doc/guides/rawdevs/cnxk_bphy.rst > create mode 100644 drivers/raw/cnxk_bphy/cnxk_bphy_cgx.c > create mode 100644 drivers/raw/cnxk_bphy/meson.build > create mode 100644 drivers/raw/cnxk_bphy/version.map > > diff --git a/MAINTAINERS b/MAINTAINERS > index 5877a1697..863b028fd 100644 > --- a/MAINTAINERS > +++ b/MAINTAINERS > @@ -1307,6 +1307,11 @@ F: doc/guides/rawdevs/ntb.rst > F: examples/ntb/ > F: doc/guides/sample_app_ug/ntb.rst > > +Marvell CNXK BPHY > +M: Tomasz Duszynski > +M: Jakub Palider > +F: drivers/raw/cnxk_bphy/ > +F: doc/guides/rawdevs/cnxk_bphy.rst It needs come in between following items DPAA2 CMDIF M: Nipun Gupta F: drivers/raw/dpaa2_cmdif/ F: doc/guides/rawdevs/dpaa2_cmdif.rst Marvell OCTEON TX2 DMA M: Radha Mohan Chintakuntla M: Veerasenareddy Burru F: drivers/raw/octeontx2_dma/ F: doc/guides/rawdevs/octeontx2_dma.rst > > Packet processing > ----------------- > diff --git a/doc/guides/rawdevs/cnxk_bphy.rst b/doc/guides/rawdevs/cnxk_bphy.rst > new file mode 100644 > index 000000000..1b117a0e8 > --- /dev/null > +++ b/doc/guides/rawdevs/cnxk_bphy.rst > @@ -0,0 +1,50 @@ > +.. SPDX-License-Identifier: BSD-3-Clause > + Copyright(c) 2021 Marvell International Ltd. Copyright(C) 2021 Marvell. Please check in all the new file. > + > +Marvell CNXK BPHY Driver > +========================================== It may create warning, "====" should stop at Driver > + > +CN10K/CN9K Fusion product families offer an internal BPHY unit which provides > +set of hardware accelerators for performing baseband related operations. Connectivity > +to the outside world happens through a block called RFOE which is backed by > +ethernet I/O block called CGX or RPM (depending on the chip version). RFOE > +stands for Radio Frequency Over Ethernet and provides support for > +IEEE 1904.3 (RoE) standard. > + > +Features > +-------- > + > +The BPHY CGX/RPM implements following features in the rawdev API: > + > +- Access to BPHY CGX/RPM via set of predefined messages. via a set of > + > +Device Setup > +------------ > + > +The BPHY CGX/RPM devices will need to be bound to a user-space IO driver for > +use. The script ``dpdk-devbind.py`` script included with DPDK can be used to > +view the state of the devices and to bind them to a suitable DPDK-supported > +kernel driver. When querying the status of the devices, they will appear under > +the category of "Misc (rawdev) devices", i.e. the command > +``dpdk-devbind.py --status-dev misc`` can be used to see the state of those > +devices alone. Proabably we can tell name or class ID to understand what to bind from misc rawdevice. > + > +To perform data transfer use standard ``rte_rawdev_enqueue_buffers()`` and > +``rte_rawdev_dequeue_buffers()`` APIs. Not all messages produce sensible > +responses hence dequeueing is not always necessary. > + > +Self test > +--------- > + > +On EAL initialization, BPHY CGX/RPM devices will be probed and populated into > +the raw devices. The rawdev ID of the device can be obtained using invocation > +of ``rte_rawdev_get_dev_id("NAME:x")`` from the test application, where: > + > +- NAME is the desired subsystem: use "BPHY_CGX" for > + RFOE module, > +- x is the device's bus id specified in "bus:device.func" (BDF) format. > + > +Use this identifier for further rawdev function calls. > + > +The driver's selftest rawdev API can be used to verify the BPHY CGX/RPM > +functionality. > diff --git a/doc/guides/rawdevs/index.rst b/doc/guides/rawdevs/index.rst > index f64ec4427..7fbae40ea 100644 > --- a/doc/guides/rawdevs/index.rst > +++ b/doc/guides/rawdevs/index.rst > @@ -11,6 +11,7 @@ application through rawdev API. > :maxdepth: 2 > :numbered: > > + cnxk_bphy > dpaa2_cmdif > dpaa2_qdma > ifpga > diff --git a/drivers/raw/cnxk_bphy/cnxk_bphy_cgx.c b/drivers/raw/cnxk_bphy/cnxk_bphy_cgx.c > new file mode 100644 > index 000000000..e537888f9 > --- /dev/null > +++ b/drivers/raw/cnxk_bphy/cnxk_bphy_cgx.c > @@ -0,0 +1,151 @@ > +/* SPDX-License-Identifier: BSD-3-Clause > + * Copyright(C) 2021 Marvell. > + */ > +#include > +#include > +#include > + > +#include > + > +struct cnxk_bphy_cgx_queue { > + unsigned int lmac; > + /* queue holds up to one response */ > + void *rsp; > +}; > + > +struct cnxk_bphy_cgx { > + struct roc_bphy_cgx *rcgx; > + struct cnxk_bphy_cgx_queue queues[MAX_LMACS_PER_CGX]; > + unsigned int num_queues; > +}; > + > +static void > +cnxk_bphy_cgx_format_name(char *name, unsigned int len, > + struct rte_pci_device *pci_dev) > +{ > + snprintf(name, len, "BPHY_CGX:%x:%02x.%x", pci_dev->addr.bus, > + pci_dev->addr.devid, pci_dev->addr.function); > +} > + > +static const struct rte_rawdev_ops cnxk_bphy_cgx_rawdev_ops = { > +}; > + > +static void > +cnxk_bphy_cgx_init_queues(struct cnxk_bphy_cgx *cgx) > +{ > + struct roc_bphy_cgx *rcgx = cgx->rcgx; > + unsigned int i; > + > + for (i = 0; i < RTE_DIM(cgx->queues); i++) { > + if (!(rcgx->lmac_bmap & BIT_ULL(i))) > + continue; > + > + cgx->queues[cgx->num_queues++].lmac = i; > + } > +} > + > +static void > +cnxk_bphy_cgx_fini_queues(struct cnxk_bphy_cgx *cgx) > +{ > + unsigned int i; > + > + for (i = 0; i < cgx->num_queues; i++) { > + if (cgx->queues[i].rsp) > + rte_free(cgx->queues[i].rsp); > + } > + > + cgx->num_queues = 0; > +} > + > +static int > +cnxk_bphy_cgx_rawdev_probe(struct rte_pci_driver *pci_drv, > + struct rte_pci_device *pci_dev) > +{ > + char name[RTE_RAWDEV_NAME_MAX_LEN]; > + struct rte_rawdev *rawdev; > + struct cnxk_bphy_cgx *cgx; > + struct roc_bphy_cgx *rcgx; > + int ret; > + > + RTE_SET_USED(pci_drv); > + > + if (rte_eal_process_type() != RTE_PROC_PRIMARY) > + return 0; > + > + if (!pci_dev->mem_resource[0].addr) > + return -ENODEV; > + > + ret = roc_plt_init(); > + if (ret) > + return ret; > + > + cnxk_bphy_cgx_format_name(name, sizeof(name), pci_dev); > + rawdev = rte_rawdev_pmd_allocate(name, sizeof(*cgx), rte_socket_id()); > + if (!rawdev) > + return -ENOMEM; > + > + rawdev->dev_ops = &cnxk_bphy_cgx_rawdev_ops; > + rawdev->device = &pci_dev->device; > + rawdev->driver_name = pci_dev->driver->driver.name; > + > + cgx = rawdev->dev_private; > + cgx->rcgx = rte_zmalloc(NULL, sizeof(*rcgx), 0); > + if (!cgx->rcgx) { > + ret = -ENOMEM; > + goto out_pmd_release; > + } > + > + rcgx = cgx->rcgx; > + rcgx->bar0_pa = pci_dev->mem_resource[0].phys_addr; > + rcgx->bar0_va = pci_dev->mem_resource[0].addr; > + ret = roc_bphy_cgx_dev_init(rcgx); > + if (ret) > + goto out_free; > + > + cnxk_bphy_cgx_init_queues(cgx); > + > + return 0; > +out_free: > + rte_free(rcgx); > +out_pmd_release: > + rte_rawdev_pmd_release(rawdev); > + > + return ret; > +} > + > +static int > +cnxk_bphy_cgx_rawdev_remove(struct rte_pci_device *pci_dev) > +{ > + char name[RTE_RAWDEV_NAME_MAX_LEN]; > + struct rte_rawdev *rawdev; > + struct cnxk_bphy_cgx *cgx; > + > + cnxk_bphy_cgx_format_name(name, sizeof(name), pci_dev); > + rawdev = rte_rawdev_pmd_get_named_dev(name); > + if (!rawdev) > + return -ENODEV; > + > + cgx = rawdev->dev_private; > + cnxk_bphy_cgx_fini_queues(cgx); > + roc_bphy_cgx_dev_fini(cgx->rcgx); > + rte_free(cgx->rcgx); > + > + return rte_rawdev_pmd_release(rawdev); > +} > + > +static const struct rte_pci_id cnxk_bphy_cgx_map[] = { > + {RTE_PCI_DEVICE(PCI_VENDOR_ID_CAVIUM, PCI_DEVID_CN9K_CGX)}, > + {RTE_PCI_DEVICE(PCI_VENDOR_ID_CAVIUM, PCI_DEVID_CN10K_RPM)}, > + {} /* sentinel */ > +}; > + > +static struct rte_pci_driver bphy_cgx_rawdev_pmd = { > + .id_table = cnxk_bphy_cgx_map, > + .drv_flags = RTE_PCI_DRV_NEED_MAPPING, > + .probe = cnxk_bphy_cgx_rawdev_probe, > + .remove = cnxk_bphy_cgx_rawdev_remove, > +}; > + > +RTE_PMD_REGISTER_PCI(cnxk_bphy_cgx_rawdev_pci_driver, bphy_cgx_rawdev_pmd); > +RTE_PMD_REGISTER_PCI_TABLE(cnxk_bphy_cgx_rawdev_pci_driver, cnxk_bphy_cgx_map); > +RTE_PMD_REGISTER_KMOD_DEP(cnxk_bphy_cgx_rawdev_pci_driver, "vfio-pci"); > diff --git a/drivers/raw/cnxk_bphy/meson.build b/drivers/raw/cnxk_bphy/meson.build > new file mode 100644 > index 000000000..a85c9774b > --- /dev/null > +++ b/drivers/raw/cnxk_bphy/meson.build > @@ -0,0 +1,8 @@ > +# SPDX-License-Identifier: BSD-3-Clause > +# Copyright(C) 2021 Marvell International Ltd. Fix license header. > +# > + > +deps += ['bus_pci', 'common_cnxk', 'rawdev'] > +sources = files( > + 'cnxk_bphy_cgx.c', > +) > diff --git a/drivers/raw/cnxk_bphy/version.map b/drivers/raw/cnxk_bphy/version.map > new file mode 100644 > index 000000000..4a76d1d52 > --- /dev/null > +++ b/drivers/raw/cnxk_bphy/version.map > @@ -0,0 +1,3 @@ > +DPDK_21 { > + local: *; > +}; > diff --git a/drivers/raw/meson.build b/drivers/raw/meson.build > index c33a7c5f3..b51536f8a 100644 > --- a/drivers/raw/meson.build > +++ b/drivers/raw/meson.build > @@ -6,6 +6,7 @@ if is_windows > endif > > drivers = [ > + 'cnxk_bphy', > 'dpaa2_cmdif', > 'dpaa2_qdma', > 'ifpga', > diff --git a/usertools/dpdk-devbind.py b/usertools/dpdk-devbind.py > index 2fe0c6a6a..be43befd6 100755 > --- a/usertools/dpdk-devbind.py > +++ b/usertools/dpdk-devbind.py > @@ -45,6 +45,8 @@ > 'SVendor': None, 'SDevice': None} > octeontx2_ree = {'Class': '08', 'Vendor': '177d', 'Device': 'a0f4', > 'SVendor': None, 'SDevice': None} > +cnxk_bphy_cgx = {'Class': '08', 'Vendor': '177d', 'Device': 'a059', 'a060' > + 'SVendor': None, 'SDevice': None} > > intel_dlb = {'Class': '0b', 'Vendor': '8086', 'Device': '270b,2710,2714', > 'SVendor': None, 'SDevice': None} > @@ -69,7 +71,7 @@ > mempool_devices = [cavium_fpa, octeontx2_npa] > compress_devices = [cavium_zip] > regex_devices = [octeontx2_ree] > -misc_devices = [intel_ioat_bdw, intel_ioat_skx, intel_ioat_icx, intel_idxd_spr, > +misc_devices = [cnxk_bphy_cgx, intel_ioat_bdw, intel_ioat_skx, intel_ioat_icx, intel_idxd_spr, > intel_ntb_skx, intel_ntb_icx, > octeontx2_dma] > > -- > 2.25.1 >