From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 9C4244265D; Thu, 28 Sep 2023 08:51:31 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 2F0FB40296; Thu, 28 Sep 2023 08:51:31 +0200 (CEST) Received: from mail-vs1-f50.google.com (mail-vs1-f50.google.com [209.85.217.50]) by mails.dpdk.org (Postfix) with ESMTP id 1DFC04027D for ; Thu, 28 Sep 2023 08:51:29 +0200 (CEST) Received: by mail-vs1-f50.google.com with SMTP id ada2fe7eead31-4545d8a95d9so1251884137.2 for ; Wed, 27 Sep 2023 23:51:29 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1695883888; x=1696488688; darn=dpdk.org; h=content-transfer-encoding:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:from:to:cc:subject:date :message-id:reply-to; bh=w1H546RZSLp2HW4t9hDX4TY5A/4Jp/3Sd+I+myftWT8=; b=LGuF+OVIt9u6BUjHHglHkBNOvuYOMyUZamFHxHvOaAU6HWYfPf9iVGZd2WaIxfvRUg ushJzNagEQ8DYgfATvJ3UBePYgw1JOQfg9LDzqq30vEWFQtvImil3zQ7b7AnhPNsg18+ KicGcWthKvfvKFnoXYd7hBgQZVVeVjRpfWIS0kMcZwLSo2hmt3zc2Y1A41mRZEPloiJJ 6LYeFbkYIbnlJfY8+jGPOYzHT7W/eHXpOs4P/VoCEHllsbdF8TuZOICtmURy1YEwn7z2 N2ySqpjGK5/lyav9BAtH9+Cp4iyQ/Dw5G/hpdkubEHlIZXU+xIpFBjTL6/i5kZ4Zacu/ FBCg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1695883888; x=1696488688; h=content-transfer-encoding:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=w1H546RZSLp2HW4t9hDX4TY5A/4Jp/3Sd+I+myftWT8=; b=QT4VbCy4+allSUEcCfwa7PG9C2VsspVpZPyAfqTsjGkbVJZf0x5lzuGvrr89mOMSYq xmaQt0G687BZxmjAvoiKCEAFU4IxFeQukNdL34lOA2Q5aYtpd1CTjWXwiCvq2qlg758g nnf45H6O3CawaEZsZzol3kXLmVCi6Ncv5n7TsDEDqyQApQXY0DMvS6XQ1QrfCSVY8ZkT eDmAQTHx67QGqU2oK6QRs5yDU1ixjggcI2kmUA21GIMD2buX5DxP3DhngdVrihTWFNQA AzgfTgnONf3hhfaiQgHcxhOtycFwD6r78a+SC0Gw9Ltd66Rs3uHyjspD6nxDBNRvrrE3 CZpQ== X-Gm-Message-State: AOJu0YzZdCl6ykBPJJljaZgkfzl4WOvp0SlSgedYD2MVkwQkLbQj+Ghe 1gT0MCssZ68KxFHAfBf7adNEJdCH0Ry1j3nN3Vg= X-Google-Smtp-Source: AGHT+IEpEHeh5nZj9CbZ1oRGHhu6PPaOpRd7sG63zh7L5R9w9GFr6w3H3nz9v6d44dgd4UnuY5gMtGnCBCs+FAlgxIw= X-Received: by 2002:a67:cf0a:0:b0:44d:3d2c:2a1a with SMTP id y10-20020a67cf0a000000b0044d3d2c2a1amr261188vsl.9.1695883888186; Wed, 27 Sep 2023 23:51:28 -0700 (PDT) MIME-Version: 1.0 References: <20230920101222.767408-1-rbhansali@marvell.com> <20230921131953.1483157-1-rbhansali@marvell.com> In-Reply-To: <20230921131953.1483157-1-rbhansali@marvell.com> From: Jerin Jacob Date: Thu, 28 Sep 2023 12:21:02 +0530 Message-ID: Subject: Re: [PATCH v2] common/cnxk: reserve last LMT line for control ops To: Rahul Bhansali Cc: dev@dpdk.org, Nithin Dabilpuram , Kiran Kumar K , Sunil Kumar Kori , Satha Rao , jerinj@marvell.com Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org On Thu, Sep 21, 2023 at 6:51=E2=80=AFPM Rahul Bhansali wrote: > > As rte_eth_dev_configure() can be called from any EAL or non-EAL cores. > And in case of non-EAL core, LMT address will not be a valid. So, > reserving last LMT line 2047 for control path specific functionality. > > Signed-off-by: Rahul Bhansali Changed the log as common/cnxk: fix LMT line access from non EAL cores In case of rte_eth_dev_configure() called from non EAL cores, the LMT ID will not be valid. As a fix, last LMT line 2047 will be reserved for non-EAL core to compute LMT address in control path specific functionality. Fixes: 7c67c489d466 ("common/cnxk: fetch engine capabilities") Cc: stable@dpdk.org Signed-off-by: Rahul Bhansali Added following diff [for-next-net]dell[dpdk-next-net-mrvl] $ git diff diff --git a/drivers/common/cnxk/version.map b/drivers/common/cnxk/version.= map index 4dce181437..9c7d8813e0 100644 --- a/drivers/common/cnxk/version.map +++ b/drivers/common/cnxk/version.map @@ -462,10 +462,10 @@ INTERNAL { roc_npc_validate_portid_action; roc_ot_ipsec_inb_sa_init; roc_ot_ipsec_outb_sa_init; + roc_plt_control_lmt_id_get; roc_plt_init; roc_plt_init_cb_register; roc_plt_lmt_validate; - roc_plt_control_lmt_id_get; roc_sso_dev_fini; roc_sso_dev_init; roc_sso_dump; Applied to dpdk-next-net-mrvl/for-next-net. Thanks > --- > v2 change: No change, sent as independent of series. > > drivers/common/cnxk/roc_dev.c | 5 +++++ > drivers/common/cnxk/roc_nix_inl.c | 6 ++++-- > drivers/common/cnxk/roc_platform.c | 25 +++++++++++++++++++++++++ > drivers/common/cnxk/roc_platform.h | 5 +++++ > drivers/common/cnxk/version.map | 2 ++ > 5 files changed, 41 insertions(+), 2 deletions(-) > > diff --git a/drivers/common/cnxk/roc_dev.c b/drivers/common/cnxk/roc_dev.= c > index 18d7981825..3815da078a 100644 > --- a/drivers/common/cnxk/roc_dev.c > +++ b/drivers/common/cnxk/roc_dev.c > @@ -1369,6 +1369,11 @@ dev_init(struct dev *dev, struct plt_pci_device *p= ci_dev) > if (!dev_cache_line_size_valid()) > return -EFAULT; > > + if (!roc_plt_lmt_validate()) { > + plt_err("Failed to validate LMT line"); > + return -EFAULT; > + } > + > bar2 =3D (uintptr_t)pci_dev->mem_resource[2].addr; > bar4 =3D (uintptr_t)pci_dev->mem_resource[4].addr; > if (bar2 =3D=3D 0 || bar4 =3D=3D 0) { > diff --git a/drivers/common/cnxk/roc_nix_inl.c b/drivers/common/cnxk/roc_= nix_inl.c > index 5cb1f11f53..750fd08355 100644 > --- a/drivers/common/cnxk/roc_nix_inl.c > +++ b/drivers/common/cnxk/roc_nix_inl.c > @@ -779,8 +779,10 @@ nix_inl_eng_caps_get(struct nix *nix) > > hw_res->cn10k.compcode =3D CPT_COMP_NOT_DONE; > > - /* Use this lcore's LMT line as no one else is using it *= / > - ROC_LMT_BASE_ID_GET(lmt_base, lmt_id); > + /* Use this reserved LMT line as no one else is using it = */ > + lmt_id =3D roc_plt_control_lmt_id_get(); > + lmt_base +=3D ((uint64_t)lmt_id << ROC_LMT_LINE_SIZE_LOG2= ); > + > memcpy((void *)lmt_base, &inst, sizeof(inst)); > > lmt_arg =3D ROC_CN10K_CPT_LMT_ARG | (uint64_t)lmt_id; > diff --git a/drivers/common/cnxk/roc_platform.c b/drivers/common/cnxk/roc= _platform.c > index a8a83a3723..15cbb6d68f 100644 > --- a/drivers/common/cnxk/roc_platform.c > +++ b/drivers/common/cnxk/roc_platform.c > @@ -21,6 +21,31 @@ roc_plt_init_cb_register(roc_plt_init_cb_t cb) > return 0; > } > > +uint16_t > +roc_plt_control_lmt_id_get(void) > +{ > + uint32_t lcore_id =3D plt_lcore_id(); > + if (lcore_id !=3D LCORE_ID_ANY) > + return lcore_id << ROC_LMT_LINES_PER_CORE_LOG2; > + else > + /* Return Last LMT ID to be use in control path functiona= lity */ > + return ROC_NUM_LMT_LINES - 1; > +} > + > +uint16_t > +roc_plt_lmt_validate(void) > +{ > + if (!roc_model_is_cn9k()) { > + /* Last LMT line is reserved for control specific operati= on and can be > + * use from any EAL or non EAL cores. > + */ > + if ((RTE_MAX_LCORE << ROC_LMT_LINES_PER_CORE_LOG2) > > + (ROC_NUM_LMT_LINES - 1)) > + return 0; > + } > + return 1; > +} > + > int > roc_plt_init(void) > { > diff --git a/drivers/common/cnxk/roc_platform.h b/drivers/common/cnxk/roc= _platform.h > index dbc0858e18..6d52a14009 100644 > --- a/drivers/common/cnxk/roc_platform.h > +++ b/drivers/common/cnxk/roc_platform.h > @@ -316,6 +316,11 @@ extern int cnxk_logtype_dpi; > __rte_internal > int roc_plt_init(void); > > +__rte_internal > +uint16_t roc_plt_control_lmt_id_get(void); > +__rte_internal > +uint16_t roc_plt_lmt_validate(void); > + > /* Init callbacks */ > typedef int (*roc_plt_init_cb_t)(void); > int __roc_api roc_plt_init_cb_register(roc_plt_init_cb_t cb); > diff --git a/drivers/common/cnxk/version.map b/drivers/common/cnxk/versio= n.map > index 38064919e4..4dce181437 100644 > --- a/drivers/common/cnxk/version.map > +++ b/drivers/common/cnxk/version.map > @@ -464,6 +464,8 @@ INTERNAL { > roc_ot_ipsec_outb_sa_init; > roc_plt_init; > roc_plt_init_cb_register; > + roc_plt_lmt_validate; > + roc_plt_control_lmt_id_get; > roc_sso_dev_fini; > roc_sso_dev_init; > roc_sso_dump; > -- > 2.25.1 >