From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id DC8DEA0548; Sat, 3 Apr 2021 12:39:46 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id B0C9040696; Sat, 3 Apr 2021 12:39:46 +0200 (CEST) Received: from mail-io1-f46.google.com (mail-io1-f46.google.com [209.85.166.46]) by mails.dpdk.org (Postfix) with ESMTP id 2D2F54067B for ; Sat, 3 Apr 2021 12:39:46 +0200 (CEST) Received: by mail-io1-f46.google.com with SMTP id x16so7598603iob.1 for ; Sat, 03 Apr 2021 03:39:46 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=QEFIjuu5g8Aa5uGUHfXdtdRGVh68wWLt7ud3Psb2SOg=; b=iA3aCz/YmhV0HgfWWgu6c36F9XuimLuijy9AQp0Otg915y/nr90FQDppM6pexj7xlC LW5wMSkOsNVt3kd6Ua2exEKdsoh40r/ZbW1z74A8ghWjjLSaT6S9Dkp37XhfAi2pZvEQ DUGeGG9+MsjFFoVzTmtE9zKYcoxvTXxYDO/XlL53xzGGem5c4waOHG8CF7RRVpS8cEnV hq4uw3WVc7uwu6lDIbGw5U+r8J/bcanT7acZISWD34TCnGQnON/PYAKIi6lrbSP+n22Y JsJSXaj19EXeGhmfUxB08lUXM4QIVWDFL9+7lO+qSwA/HphKwXBzzxoKyvs+v8xyisI4 vbZg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=QEFIjuu5g8Aa5uGUHfXdtdRGVh68wWLt7ud3Psb2SOg=; b=Z7TSKmJk3RB6ZZKFgUPwdpM1dixe//A6DG8UABnsshMWj6TEoR8upkNwsxNxYyTgPb 6l1ePCuzn2UbsXmw9nds5AW5PWexyNQaQzY5U3qvSqhQBo/zxCO39qCkPadWjZ5udxkd MgC/5z6+EWkLnNS8Nz2d21M+KHlXnXDhSJFccuqd+1ll68byJyQ2W6NXWtrzkA/jTXe5 8Li6LFVh8FWmAxsvMgTCGvOtNwAedo57sX0ZU6MNaL3kLAkp33X96UCi7H42zaoG6n79 03hDXhKg4BwT2DojL7e6wzOtZOOOZpQ/msrNeKC7vSHZFdwHD6LVFUJbR4MeH+HfBOOe U4Yw== X-Gm-Message-State: AOAM5333vCs/vNJSoJQNyyecKjtX4XBqqA3ZYxEGFA7DsK37u3Nh8iZS nlLFgpTlbojmqE/Ztr6HVi53wcwqCcqcotgwbAw= X-Google-Smtp-Source: ABdhPJyDDMZVSBADMvWOya7WEuAzQKo/IqzmnFgcBW7FB4g4T7oErVF7s5Wte5sMeK2TJDbJvXquMoxb939iIYjrHvA= X-Received: by 2002:a6b:b7cd:: with SMTP id h196mr13623406iof.59.1617446385472; Sat, 03 Apr 2021 03:39:45 -0700 (PDT) MIME-Version: 1.0 References: <20210316221857.2254-2-timothy.mcdaniel@intel.com> <1617132940-24800-1-git-send-email-timothy.mcdaniel@intel.com> <1617132940-24800-28-git-send-email-timothy.mcdaniel@intel.com> In-Reply-To: <1617132940-24800-28-git-send-email-timothy.mcdaniel@intel.com> From: Jerin Jacob Date: Sat, 3 Apr 2021 16:09:29 +0530 Message-ID: To: Timothy McDaniel Cc: dpdk-dev , Erik Gabriel Carrillo , Gage Eads , "Van Haaren, Harry" , Jerin Jacob , Thomas Monjalon Content-Type: text/plain; charset="UTF-8" Subject: Re: [dpdk-dev] [PATCH v2 27/27] event/dlb2: Change device name to dlb_event X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" On Wed, Mar 31, 2021 at 1:09 AM Timothy McDaniel wrote: > > Updated eventdev device name to be dlb_event instead of > dlb2_event. The new name will be used for all versions > of the DLB hardware. This change required corresponding changes > to the the directory name that contains the PMD, as well > as the documentation files, build infrastructure, and PMD > specific APIs. > > Signed-off-by: Timothy McDaniel # Change the patch subject to event/dlb: # Also, I can still still see[1], doc/guides/eventdevs/dlb.rst and doc/guides/eventdevs/dlb2.rst. Let have only one .rst file for one driver. # Please check the documentation carefully, I see the example in vdev arguments still messed up with dlb2 and dlb1. Please check and correct as needed. [1] [for-main]dell[dpdk-next-eventdev] $ git diff HEAD~27 --stat MAINTAINERS | 6 +- app/test/test_eventdev.c | 6 +- config/rte_config.h | 11 +- doc/api/doxy-api-index.md | 2 +- doc/api/doxy-api.conf.in | 2 +- doc/guides/eventdevs/dlb.rst | 390 ++++++++++++++++ doc/guides/eventdevs/dlb.rst | 75 ++- doc/guides/eventdevs/index.rst | 2 +- doc/guides/rel_notes/release_21_05.rst | 5 + drivers/event/{dlb2 => dlb}/dlb2.c | 451 ++++++++++++----- > +/* DLB defines */ > +#define RTE_LIBRTE_PMD_DLB_POLL_INTERVAL 1000 > +#undef RTE_LIBRTE_PMD_DLB_QUELL_STATS > +#define RTE_LIBRTE_PMD_DLB_SW_CREDIT_QUANTA 32 > +#define RTE_LIBRTE_PMD_DLB_DEFAULT_DEPTH_THRESH 256 PLEASE MOVE THIS ALL TO RUNTIME. If it not used in fastpath. > +Deferred Scheduling > +~~~~~~~~~~~~~~~~~~~ > + > +The DLB2 PMD's default behavior for managing a CQ is to "pop" the CQ once per > +dequeued event before returning from rte_event_dequeue_burst(). This frees the > +corresponding entries in the CQ, which enables the DLB2 to schedule more events > +to it. > + > +To support applications seeking finer-grained scheduling control -- for example > +deferring scheduling to get the best possible priority scheduling and > +load-balancing -- the PMD supports a deferred scheduling mode. In this mode, > +the CQ entry is not popped until the *subsequent* rte_event_dequeue_burst() > +call. This mode only applies to load-balanced event ports with dequeue depth of > +1. > + > +To enable deferred scheduling, use the defer_sched vdev argument like so: > + > + .. code-block:: console > + > + --vdev=dlb1_event,defer_sched=on It should be dlb_event. Right? > + > +Atomic Inflights Allocation > +~~~~~~~~~~~~~~~~~~~~~~~~~~~ > + > +In the last stage prior to scheduling an atomic event to a CQ, DLB2 holds the > +inflight event in a temporary buffer that is divided among load-balanced > +queues. If a queue's atomic buffer storage fills up, this can result in > +head-of-line-blocking. For example: > + > +- An LDB queue allocated N atomic buffer entries > +- All N entries are filled with events from flow X, which is pinned to CQ 0. > + > +Until CQ 0 releases 1+ events, no other atomic flows for that LDB queue can be > +scheduled. The likelihood of this case depends on the eventdev configuration, > +traffic behavior, event processing latency, potential for a worker to be > +interrupted or otherwise delayed, etc. > + > +By default, the PMD allocates 16 buffer entries for each load-balanced queue, > +which provides an even division across all 128 queues but potentially wastes > +buffer space (e.g. if not all queues are used, or aren't used for atomic > +scheduling). > + > +The PMD provides a dev arg to override the default per-queue allocation. To > +increase a vdev's per-queue atomic-inflight allocation to (for example) 64: > + > + .. code-block:: console > + > + --vdev=dlb1_event,atm_inflights=64 It should be dlb_event. Right? > + > +QID Depth Threshold > +~~~~~~~~~~~~~~~~~~~ > + > +DLB2 supports setting and tracking queue depth thresholds. Hardware uses > +the thresholds to track how full a queue is compared to its threshold. > +Four buckets are used > + > +- Less than or equal to 50% of queue depth threshold > +- Greater than 50%, but less than or equal to 75% of depth threshold > +- Greater than 75%, but less than or equal to 100% of depth threshold > +- Greater than 100% of depth thresholds > + > +Per queue threshold metrics are tracked in the DLB2 xstats, and are also > +returned in the impl_opaque field of each received event. > + > +The per qid threshold can be specified as part of the device args, and > +can be applied to all queue, a range of queues, or a single queue, as > +shown below. > + > + .. code-block:: console > + > + --vdev=dlb2_event,qid_depth_thresh=all: > + --vdev=dlb2_event,qid_depth_thresh=qidA-qidB: > + --vdev=dlb2_event,qid_depth_thresh=qid: It should be dlb_event. Right?