From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id EB7DDA04B6; Wed, 19 Jan 2022 17:16:02 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id ACFBA41163; Wed, 19 Jan 2022 17:16:01 +0100 (CET) Received: from mail-io1-f54.google.com (mail-io1-f54.google.com [209.85.166.54]) by mails.dpdk.org (Postfix) with ESMTP id 1CEBF41147 for ; Wed, 19 Jan 2022 17:16:00 +0100 (CET) Received: by mail-io1-f54.google.com with SMTP id y22so3407030iof.7 for ; Wed, 19 Jan 2022 08:16:00 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=J8C914yovemlrowRm5OS65dhkJ6AfvBEtWKWStMtZfU=; b=JEIA8FhiQyxkeWu3gx3FyMcLYo84/RE4PaEtAAZZlvMfipctIl8K7srZGWdV6T4gug Sz7wsS3ZZ016MDo4kLZ5+7rTWemBTCoZKLa3otf7+h+uBYtskSM4bZ9DHETdYam2RiqB BwANF1tvm4bDXJrVvLsG0RSp1yywDBrDhfVhCkkZm6NilbmrynX5q8M7tiooeSsgGPY6 OyYrdCFZdeeJUY8mUIBVJ2frsBXX9Wy2xD2cCDGfyJ2tzQswlN0v34xOA/MCTAXpsUyv Ms68wMPlo5oGjGVTHEWO5shLnMCXwJDIdwAPJ4hIqgByetpZDT9bwH6sxbs/u+H+/btp bwEQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=J8C914yovemlrowRm5OS65dhkJ6AfvBEtWKWStMtZfU=; b=UaSVVgtoSDEq5SkPecnlLyFMErbt0esS7YPa0Z2bGafZdJildITCLgHvrEqInxvVL1 VCGhW540ebMlalxYkr8Myk1fM6+C8bbUD6ZQ380oBwVpY3zOBf33z4N7VODYpaglgNfM EkNzxUY78rinCJEdp6nqk0l1QDeQSFIbLprpG4rlBnbmrmWHF+KrlIiWiUYa5cCgAV2a iOgoprEpe2ceb16en4DcvmnqNdeswSOXzuarVYTA5eEOHw80IsA3yrOzkQH+tCVwjdHR W3V2iefSoe0RbG5qKtr7bocL05XBMmokgVGQ1vsm4d90geK8KrE0+eh40PI0A0jwdYQP RrQA== X-Gm-Message-State: AOAM531tvmxt2itSvp9+KThFrYQipabk2IMP9N1eHjSKz2DvO5NbiX8z mrmDOvm+r/aV1xxYZCnyPHX0LVFeWGNQON3d1os= X-Google-Smtp-Source: ABdhPJytz81X+1+5ZBtNd2U6XGjO5oZk7nLKQwfmGiQB3uHlYMBu3o/bmrHQRnNQpQTyg+o36Uu3HrubUhe0diV/upY= X-Received: by 2002:a05:6602:200b:: with SMTP id y11mr15751839iod.121.1642608959408; Wed, 19 Jan 2022 08:15:59 -0800 (PST) MIME-Version: 1.0 References: <20211209091342.27017-1-ndabilpuram@marvell.com> In-Reply-To: <20211209091342.27017-1-ndabilpuram@marvell.com> From: Jerin Jacob Date: Wed, 19 Jan 2022 21:45:33 +0530 Message-ID: Subject: Re: [PATCH 1/8] common/cnxk: fix shift offset for tl3 length disable To: Nithin Dabilpuram , Ferruh Yigit Cc: Jerin Jacob , Kiran Kumar K , Sunil Kumar Kori , Satha Rao , dpdk-dev Content-Type: text/plain; charset="UTF-8" X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org On Thu, Dec 9, 2021 at 2:43 PM Nithin Dabilpuram wrote: > > Fix shift offset for length disable flag in NIXX_AF_TL3X_SHAPE > register to be 24 instead of zero similar to other level SHAPE > registers. Also mask unused bits in adjust value. > > Fixes: 0885429c3028 ("common/cnxk: add NIX TM hierarchy enable/disable") > > Signed-off-by: Nithin Dabilpuram > Signed-off-by: Satha Rao 1) FIxed following warning Is it candidate for Cc: stable@dpdk.org backport? common/cnxk: fix shift offset for tl3 length disable 2) Change tl3 to TL3. Applied to dpdk-next-net-mrvl/for-next-net. Thanks > --- > drivers/common/cnxk/roc_nix_tm_utils.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/drivers/common/cnxk/roc_nix_tm_utils.c b/drivers/common/cnxk/roc_nix_tm_utils.c > index 543adf9..9e80c2a 100644 > --- a/drivers/common/cnxk/roc_nix_tm_utils.c > +++ b/drivers/common/cnxk/roc_nix_tm_utils.c > @@ -642,6 +642,7 @@ nix_tm_shaper_reg_prep(struct nix_tm_node *node, > else if (profile) > adjust = profile->pkt_len_adj; > > + adjust &= 0x1FF; > plt_tm_dbg("Shaper config node %s(%u) lvl %u id %u, " > "pir %" PRIu64 "(%" PRIu64 "B)," > " cir %" PRIu64 "(%" PRIu64 "B)" > @@ -708,7 +709,7 @@ nix_tm_shaper_reg_prep(struct nix_tm_node *node, > /* Configure RED algo */ > reg[k] = NIX_AF_TL3X_SHAPE(schq); > regval[k] = (adjust | (uint64_t)node->red_algo << 9 | > - (uint64_t)node->pkt_mode); > + (uint64_t)node->pkt_mode << 24); > k++; > > break; > -- > 2.8.4 >