From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id C37BAA0C44; Mon, 12 Apr 2021 08:01:47 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 56A25141508; Mon, 12 Apr 2021 08:01:47 +0200 (CEST) Received: from mail-il1-f181.google.com (mail-il1-f181.google.com [209.85.166.181]) by mails.dpdk.org (Postfix) with ESMTP id 390AE4069D; Mon, 12 Apr 2021 08:01:46 +0200 (CEST) Received: by mail-il1-f181.google.com with SMTP id i22so5307319ila.11; Sun, 11 Apr 2021 23:01:46 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=Gnjrw4heTP8+Pag4GE5DzjKhzfyWIIMeMLYtGEG5bK8=; b=lt93Ww+tDfVXTjtPtCt39Zey+zMWYozs3z1aEEl4apRCZOEKSi1WwVsatr1GbCA9yI GwIvejZhCkQll22AI0G9JHtkQOQ/zT4GNf++YYqbCaBZdS05eascKszQlCCYYAPo2xM5 ZqDplYWCXeqv0775fd2lI5b+pwHp5riDaGd+W8XU0/Tj4w5I1coneBSvmlxFtp+t8Jid dXbeTCT0j+D0/87aecWmrvCiCYXPdsEZmE1L0Yrq2Mby8BJ6gsR9hHwZHp5Dx3rGcbRK bP5IJh11rzEHcIXaGjWzUkyAXeKFreGawA7MYfM9YYoL4F8MdlIoRs7RM65/C/2WXpNf 4/DA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=Gnjrw4heTP8+Pag4GE5DzjKhzfyWIIMeMLYtGEG5bK8=; b=ktGo1frxNfDKdPY59xy/+8r/7keYR3hknnAsr5cYG9vwiC2r33CSQnWur2wYDVWNSh Vu90tHQtwPBBUapNcQPnhIaWbXFVo0DPYsUyneJ5/+seK7TglRIPlv0PZJFRofKVoIwy D3rg0TlDfso1NXMgD6X3VRK+yRUjw0WB7y/8ZNWFI6ci+JQ60RfdJexqTNrUEL2OgCJK RCD0wC0c+BYOwRQlre1LAXwhm63fxDdRkwRH5RLtzhLcr3waBGlTi9GaUxpqKpACQ4Sb ZBEj1UawZwYK8UCpjXiD9IL7DO7sKrm5WY9H7t9mcb7//2OQgQx3vTVjvks4Ap0GjhBM EpRw== X-Gm-Message-State: AOAM531ao8zXBor4tPgHy4HLIRVIps1DFnkTCDQ35WUOwITVQ3rx/w76 VbWFfpA7q6+x/yOK3zCLIP7kLqSf74IIhzjkXH0= X-Google-Smtp-Source: ABdhPJw2Z+x/hnCcruLME3fksYLVkY2yNZBhjZqPVJA9lnfCKfnC9n0LInAMW8ge6gAF+sr4HTwHbHz9UGU/0MahMjk= X-Received: by 2002:a92:d806:: with SMTP id y6mr21988296ilm.130.1618207305559; Sun, 11 Apr 2021 23:01:45 -0700 (PDT) MIME-Version: 1.0 References: <20210405162415.13818-1-hkalra@marvell.com> In-Reply-To: <20210405162415.13818-1-hkalra@marvell.com> From: Jerin Jacob Date: Mon, 12 Apr 2021 11:31:29 +0530 Message-ID: To: Harman Kalra Cc: Pavan Nikhilesh , Jerin Jacob , dpdk-dev , dpdk stable Content-Type: text/plain; charset="UTF-8" Subject: Re: [dpdk-dev] [PATCH] event/octeontx2: fix device reconfigure for single slot X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" On Mon, Apr 5, 2021 at 9:54 PM Harman Kalra wrote: > > When device is re-configured, memory allocated for work slot is freed > and new memory is allocated. Due to this we may loose some important > configurations/mappings done with initial work slot memory. > > For example, whenever rte_event_eth_tx_adapter_queue_add is called > some important meta i.e. txq handle is stored in work slot structure. > If device gets reconfigured after this tx adaptor add, txq to work > slot mapping will be lost resulting in seg fault during packet > processing, as txq handle could not be retrieved from work slot. > > Fixes: 67b5f4686459 ("event/octeontx2: add port config functions") > Cc: stable@dpdk.org > > Signed-off-by: Harman Kalra Applied to dpdk-next-eventdev/for-main. Thanks. > --- > drivers/event/octeontx2/otx2_evdev.c | 34 +++++++++++++--------------- > 1 file changed, 16 insertions(+), 18 deletions(-) > > diff --git a/drivers/event/octeontx2/otx2_evdev.c b/drivers/event/octeontx2/otx2_evdev.c > index 7e2343599..a6beed069 100644 > --- a/drivers/event/octeontx2/otx2_evdev.c > +++ b/drivers/event/octeontx2/otx2_evdev.c > @@ -885,29 +885,27 @@ sso_configure_ports(const struct rte_eventdev *event_dev) > struct otx2_ssogws *ws; > uintptr_t base; > > - /* Free memory prior to re-allocation if needed */ > if (event_dev->data->ports[i] != NULL) { > ws = event_dev->data->ports[i]; > - rte_free(ssogws_get_cookie(ws)); > - ws = NULL; > - } > + } else { > + /* Allocate event port memory */ > + ws = rte_zmalloc_socket("otx2_sso_ws", > + sizeof(struct otx2_ssogws) + > + RTE_CACHE_LINE_SIZE, > + RTE_CACHE_LINE_SIZE, > + event_dev->data->socket_id); > + if (ws == NULL) { > + otx2_err("Failed to alloc memory for port=%d", > + i); > + rc = -ENOMEM; > + break; > + } > > - /* Allocate event port memory */ > - ws = rte_zmalloc_socket("otx2_sso_ws", > - sizeof(struct otx2_ssogws) + > - RTE_CACHE_LINE_SIZE, > - RTE_CACHE_LINE_SIZE, > - event_dev->data->socket_id); > - if (ws == NULL) { > - otx2_err("Failed to alloc memory for port=%d", i); > - rc = -ENOMEM; > - break; > + /* First cache line is reserved for cookie */ > + ws = (struct otx2_ssogws *) > + ((uint8_t *)ws + RTE_CACHE_LINE_SIZE); > } > > - /* First cache line is reserved for cookie */ > - ws = (struct otx2_ssogws *) > - ((uint8_t *)ws + RTE_CACHE_LINE_SIZE); > - > ws->port = i; > base = dev->bar2 + (RVU_BLOCK_ADDR_SSOW << 20 | i << 12); > sso_set_port_ops(ws, base); > -- > 2.18.0 >