From: Jerin Jacob <jerinjacobk@gmail.com>
To: "Andrzej Ostruszka [C]" <aostruszka@marvell.com>,
Ferruh Yigit <ferruh.yigit@intel.com>
Cc: "dev@dpdk.org" <dev@dpdk.org>
Subject: Re: [dpdk-dev] [PATCH] [v1 1/1] net/octeontx2: add routines to set/clear interrupt enable registers
Date: Mon, 6 Apr 2020 01:50:22 +0530 [thread overview]
Message-ID: <CALBAE1MnAgCPZRSkhencato1d2R-qvjM4NEFh9b6PmjXhjV_0g@mail.gmail.com> (raw)
In-Reply-To: <cf535f59-9842-f28d-ceb8-8f9326715d31@marvell.com>
On Fri, Apr 3, 2020 at 7:05 PM Andrzej Ostruszka [C]
<aostruszka@marvell.com> wrote:
>
> On 4/3/20 4:20 AM, vattunuru@marvell.com wrote:
> > From: Vamsi Attunuru <vattunuru@marvell.com>
> >
> > Patch adds routines to set/clear nix lf error & ras interrupt enable
> > registers. These nix lf error interrupts get triggered if there are
> > any failures during nix lf configuration. This interrupts are enabled
> > before any hardware configurations initiated on the allocated nix lf.
> >
> > Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
> > ---
>
> Acked-by: Andrzej Ostruszka <aostruszka@marvell.com>
Changed the subject to "net/octeontx2: enable error and ras interrupt
in configure".
Applied to dpdk-next-net-mrvl/master. Thanks
prev parent reply other threads:[~2020-04-05 20:20 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-04-03 2:20 vattunuru
2020-04-03 13:34 ` Andrzej Ostruszka [C]
2020-04-05 20:20 ` Jerin Jacob [this message]
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