From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 1922AA0562; Tue, 4 May 2021 12:08:35 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 7F0D540147; Tue, 4 May 2021 12:08:34 +0200 (CEST) Received: from mail-io1-f53.google.com (mail-io1-f53.google.com [209.85.166.53]) by mails.dpdk.org (Postfix) with ESMTP id 4CDE240141 for ; Tue, 4 May 2021 12:08:33 +0200 (CEST) Received: by mail-io1-f53.google.com with SMTP id z14so6592439ioc.12 for ; Tue, 04 May 2021 03:08:33 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=j+gas1mCgpCP4HoMtO9osAQhOI1eC6k5X6Utdz1zMto=; b=Z35lM1o+Rv9Q6ONqV80H8cis/nsJ/abemWxdexED4hM4mGfn8kxCr1f4AT6IMMPJDN 2OJLHnxWB4kGKJEj0Ctt3cD8X76RAY1HbGB/oyHYgupeZmku5oY+obVgWh15DKjEzab2 Qc+spRVr3KKs8wHHMQBjlIn6cRo5dqCEqQf71wIlJdmHuta+tWphga9Pj+ScBr6+Dztb O4hTkc5QjwCjMZvCwxDZO5dJP0QMihnNR1d/owoiOWXcB8wNuuzAn7nZNBdFZlh+7O+m Wr7LrTMRoFxRDUM6T5DE/8dneefRdKOBgLtACf3UDS4NYpq7mowR4nCHRuL1XTySRnFQ jucQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=j+gas1mCgpCP4HoMtO9osAQhOI1eC6k5X6Utdz1zMto=; b=eRf4+zZFyI9vY44snhkDd13dY4c3XUGleg3uIH8k4a8WIiDNK+wrWUKLZgwnWhowfj 2pjxRmmWpjMene3IzIhv8abwqphlkkbm6G1rC3sE6MAMWf9iDZDlCDiwR2iLN+D9G9SX ukPfob9OdEibOTGzCPyE9NH0ePQU6c1BQ42e8jyDupQTa7G31qKC8iKd0gleOYvDgq6K 95jlx8Yr4zkG5ohQRem2JlKby3T16KvjEzgKyVRI81wRBWCLM31S9YaaBNiFROfLlP7E HSds0swmI97Q6YP0xWRm9ovXn0JMo3wq0TyIjke97S1uLThZI4SLQybHaAIEl/q/DqUS dqsQ== X-Gm-Message-State: AOAM533v0sSF9PS2FUesYNoo+3kv2ZOkGwpjOCP7GvsMvD94oe9yZWwE PRDzer9MpIFczpSrjW7VALeozgegGwtn0QWKKA0= X-Google-Smtp-Source: ABdhPJxIMn7eeOgYD6gZVoSDcQWf0XAPHuMvErIDEdTVpR908lSxUobf3PAiuEYZrXs+OK96A0OEvu6d7aaT1U/qIUg= X-Received: by 2002:a05:6638:3c8:: with SMTP id r8mr22410700jaq.112.1620122912657; Tue, 04 May 2021 03:08:32 -0700 (PDT) MIME-Version: 1.0 References: <20210503152238.2437-1-pbhagavatula@marvell.com> <20210504002726.525-1-pbhagavatula@marvell.com> <20210504002726.525-22-pbhagavatula@marvell.com> In-Reply-To: From: Jerin Jacob Date: Tue, 4 May 2021 15:38:16 +0530 Message-ID: To: "Kinsella, Ray" Cc: Pavan Nikhilesh , Jerin Jacob , Nithin Dabilpuram , Kiran Kumar K , Sunil Kumar Kori , Satha Rao , Neil Horman , Shijith Thotton , dpdk-dev Content-Type: text/plain; charset="UTF-8" Subject: Re: [dpdk-dev] [PATCH v5 21/35] event/cnxk: add event port and queue xstats X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" On Tue, May 4, 2021 at 3:21 PM Kinsella, Ray wrote: > > > > On 04/05/2021 01:27, pbhagavatula@marvell.com wrote: > > From: Pavan Nikhilesh > > > > Add support for retrieving statistics from SSO HWS and HWGRP. > > > > Signed-off-by: Pavan Nikhilesh > > --- > > drivers/common/cnxk/roc_sso.c | 63 +++++ > > drivers/common/cnxk/roc_sso.h | 19 ++ > > drivers/common/cnxk/version.map | 2 + > > drivers/event/cnxk/cnxk_eventdev.h | 15 ++ > > drivers/event/cnxk/cnxk_eventdev_stats.c | 289 +++++++++++++++++++++++ > > drivers/event/cnxk/meson.build | 3 +- > > 6 files changed, 390 insertions(+), 1 deletion(-) > > create mode 100644 drivers/event/cnxk/cnxk_eventdev_stats.c > > > > diff --git a/drivers/common/cnxk/roc_sso.c b/drivers/common/cnxk/roc_sso.c > > index 80d032039..1ccf2626b 100644 > > --- a/drivers/common/cnxk/roc_sso.c > > +++ b/drivers/common/cnxk/roc_sso.c > > @@ -279,6 +279,69 @@ roc_sso_hws_unlink(struct roc_sso *roc_sso, uint8_t hws, uint16_t hwgrp[], > > return nb_hwgrp; > > } > > > > +int > > +roc_sso_hws_stats_get(struct roc_sso *roc_sso, uint8_t hws, > > + struct roc_sso_hws_stats *stats) > > +{ > > + struct dev *dev = &roc_sso_to_sso_priv(roc_sso)->dev; > > + struct sso_hws_stats *req_rsp; > > + int rc; > > + > > + req_rsp = (struct sso_hws_stats *)mbox_alloc_msg_sso_hws_get_stats( > > + dev->mbox); > > + if (req_rsp == NULL) { > > + rc = mbox_process(dev->mbox); > > + if (rc < 0) > > + return rc; > > + req_rsp = (struct sso_hws_stats *) > > + mbox_alloc_msg_sso_hws_get_stats(dev->mbox); > > + if (req_rsp == NULL) > > + return -ENOSPC; > > + } > > + req_rsp->hws = hws; > > + rc = mbox_process_msg(dev->mbox, (void **)&req_rsp); > > + if (rc) > > + return rc; > > + > > + stats->arbitration = req_rsp->arbitration; > > + return 0; > > +} > > + > > +int > > +roc_sso_hwgrp_stats_get(struct roc_sso *roc_sso, uint8_t hwgrp, > > + struct roc_sso_hwgrp_stats *stats) > > +{ > > + struct dev *dev = &roc_sso_to_sso_priv(roc_sso)->dev; > > + struct sso_grp_stats *req_rsp; > > + int rc; > > + > > + req_rsp = (struct sso_grp_stats *)mbox_alloc_msg_sso_grp_get_stats( > > + dev->mbox); > > + if (req_rsp == NULL) { > > + rc = mbox_process(dev->mbox); > > + if (rc < 0) > > + return rc; > > + req_rsp = (struct sso_grp_stats *) > > + mbox_alloc_msg_sso_grp_get_stats(dev->mbox); > > + if (req_rsp == NULL) > > + return -ENOSPC; > > + } > > + req_rsp->grp = hwgrp; > > + rc = mbox_process_msg(dev->mbox, (void **)&req_rsp); > > + if (rc) > > + return rc; > > + > > + stats->aw_status = req_rsp->aw_status; > > + stats->dq_pc = req_rsp->dq_pc; > > + stats->ds_pc = req_rsp->ds_pc; > > + stats->ext_pc = req_rsp->ext_pc; > > + stats->page_cnt = req_rsp->page_cnt; > > + stats->ts_pc = req_rsp->ts_pc; > > + stats->wa_pc = req_rsp->wa_pc; > > + stats->ws_pc = req_rsp->ws_pc; > > + return 0; > > +} > > + > > int > > roc_sso_hwgrp_hws_link_status(struct roc_sso *roc_sso, uint8_t hws, > > uint16_t hwgrp) > > diff --git a/drivers/common/cnxk/roc_sso.h b/drivers/common/cnxk/roc_sso.h > > index f85799ba8..a6030e7d8 100644 > > --- a/drivers/common/cnxk/roc_sso.h > > +++ b/drivers/common/cnxk/roc_sso.h > > @@ -12,6 +12,21 @@ struct roc_sso_hwgrp_qos { > > uint8_t taq_prcnt; > > }; > > > > +struct roc_sso_hws_stats { > > + uint64_t arbitration; > > +}; > > + > > +struct roc_sso_hwgrp_stats { > > + uint64_t ws_pc; > > + uint64_t ext_pc; > > + uint64_t wa_pc; > > + uint64_t ts_pc; > > + uint64_t ds_pc; > > + uint64_t dq_pc; > > + uint64_t aw_status; > > + uint64_t page_cnt; > > +}; > > + > > struct roc_sso { > > struct plt_pci_device *pci_dev; > > /* Public data. */ > > @@ -61,5 +76,9 @@ uintptr_t __roc_api roc_sso_hwgrp_base_get(struct roc_sso *roc_sso, > > /* Debug */ > > void __roc_api roc_sso_dump(struct roc_sso *roc_sso, uint8_t nb_hws, > > uint16_t hwgrp, FILE *f); > > +int __roc_api roc_sso_hwgrp_stats_get(struct roc_sso *roc_sso, uint8_t hwgrp, > > + struct roc_sso_hwgrp_stats *stats); > Missing rte_internal? > > +int __roc_api roc_sso_hws_stats_get(struct roc_sso *roc_sso, uint8_t hws, > > + struct roc_sso_hws_stats *stats); > Missing rte_internal? In order to avoid changes in the common code(which is used by other environments), drivers/common/cnxk/roc_platform.h has #define __roc_api __rte_internal to meet above use case. > > > > #endif /* _ROC_SSOW_H_ */ > > diff --git a/drivers/common/cnxk/version.map b/drivers/common/cnxk/version.map > > index 5f2264f23..8e67c83a6 100644 > > --- a/drivers/common/cnxk/version.map > > +++ b/drivers/common/cnxk/version.map > > @@ -183,8 +183,10 @@ INTERNAL { > > roc_sso_hwgrp_qos_config; > > roc_sso_hwgrp_release_xaq; > > roc_sso_hwgrp_set_priority; > > + roc_sso_hwgrp_stats_get; > > roc_sso_hws_base_get; > > roc_sso_hws_link; > > + roc_sso_hws_stats_get; > > roc_sso_hws_unlink; > > roc_sso_ns_to_gw; > > roc_sso_rsrc_fini; > > diff --git a/drivers/event/cnxk/cnxk_eventdev.h b/drivers/event/cnxk/cnxk_eventdev.h > > index 9af04bc3d..abe36f21f 100644 > > --- a/drivers/event/cnxk/cnxk_eventdev.h > > +++ b/drivers/event/cnxk/cnxk_eventdev.h > > @@ -214,6 +214,21 @@ int cnxk_sso_close(struct rte_eventdev *event_dev, cnxk_sso_unlink_t unlink_fn); > > int cnxk_sso_selftest(const char *dev_name); > > void cnxk_sso_dump(struct rte_eventdev *event_dev, FILE *f); > > > > +/* Stats API. */ > > +int cnxk_sso_xstats_get_names(const struct rte_eventdev *event_dev, > > + enum rte_event_dev_xstats_mode mode, > > + uint8_t queue_port_id, > > + struct rte_event_dev_xstats_name *xstats_names, > > + unsigned int *ids, unsigned int size); > > +int cnxk_sso_xstats_get(const struct rte_eventdev *event_dev, > > + enum rte_event_dev_xstats_mode mode, > > + uint8_t queue_port_id, const unsigned int ids[], > > + uint64_t values[], unsigned int n); > > +int cnxk_sso_xstats_reset(struct rte_eventdev *event_dev, > > + enum rte_event_dev_xstats_mode mode, > > + int16_t queue_port_id, const uint32_t ids[], > > + uint32_t n); > > + > > /* CN9K */ > > void cn9k_sso_set_rsrc(void *arg); > > > > diff --git a/drivers/event/cnxk/cnxk_eventdev_stats.c b/drivers/event/cnxk/cnxk_eventdev_stats.c > > new file mode 100644 > > + "inuse_pages", > > + offsetof(struct roc_sso_hwgrp_stats, page_cnt), > > + 0xFFFFFFFF, > > + 0, > > + {0}, > > + }, > > +}; > > + > > +#define CNXK_SSO_NUM_HWS_XSTATS RTE_DIM(sso_hws_xstats) > > +#define CNXK_SSO_NUM_GRP_XSTATS RTE_DIM(sso_hwgrp_xstats) > > + > > +#define CNXK_SSO_NUM_XSTATS (CNXK_SSO_NUM_HWS_XSTATS + CNXK_SSO_NUM_GRP_XSTATS) > > + > > +int > > +cnxk_sso_xstats_get(const struct rte_eventdev *event_dev, > > + enum rte_event_dev_xstats_mode mode, uint8_t queue_port_id, > > + const unsigned int ids[], uint64_t values[], unsigned int n) > > +{ > > + struct cnxk_sso_evdev *dev = cnxk_sso_pmd_priv(event_dev); > > + struct roc_sso_hwgrp_stats hwgrp_stats; > > + struct cnxk_sso_xstats_name *xstats; > > + struct cnxk_sso_xstats_name *xstat; > > + struct roc_sso_hws_stats hws_stats; > > + uint32_t xstats_mode_count = 0; > > + uint32_t start_offset = 0; > > + unsigned int i; > > + uint64_t value; > > + void *rsp; > > + int rc; > > + > > + switch (mode) { > > + case RTE_EVENT_DEV_XSTATS_DEVICE: > > + return 0; > > + case RTE_EVENT_DEV_XSTATS_PORT: > > + if (queue_port_id >= (signed int)dev->nb_event_ports) > > + goto invalid_value; > > + > > + xstats_mode_count = CNXK_SSO_NUM_HWS_XSTATS; > > + xstats = sso_hws_xstats; > > + > > + rc = roc_sso_hws_stats_get(&dev->sso, queue_port_id, > > + &hws_stats); > > + if (rc < 0) > > + goto invalid_value; > > + rsp = &hws_stats; > > + break; > > + case RTE_EVENT_DEV_XSTATS_QUEUE: > > + if (queue_port_id >= (signed int)dev->nb_event_queues) > > + goto invalid_value; > > + > > + xstats_mode_count = CNXK_SSO_NUM_GRP_XSTATS; > > + start_offset = CNXK_SSO_NUM_HWS_XSTATS; > > + xstats = sso_hwgrp_xstats; > > + > > + rc = roc_sso_hwgrp_stats_get(&dev->sso, queue_port_id, > > + &hwgrp_stats); > > + if (rc < 0) > > + goto invalid_value; > > + rsp = &hwgrp_stats; > > + > > + break; > > + default: > > + plt_err("Invalid mode received"); > > + goto invalid_value; > > + }; > > + > > + for (i = 0; i < n && i < xstats_mode_count; i++) { > > + xstat = &xstats[ids[i] - start_offset]; > > + value = *(uint64_t *)((char *)rsp + xstat->offset); > > + value = (value >> xstat->shift) & xstat->mask; > > + > > + values[i] = value; > > + values[i] -= xstat->reset_snap[queue_port_id]; > > + } > > + > > + return i; > > +invalid_value: > > + return -EINVAL; > > +} > > + > > +int > > +cnxk_sso_xstats_reset(struct rte_eventdev *event_dev, > > + enum rte_event_dev_xstats_mode mode, > > + int16_t queue_port_id, const uint32_t ids[], uint32_t n) > > +{ > > + struct cnxk_sso_evdev *dev = cnxk_sso_pmd_priv(event_dev); > > + struct roc_sso_hwgrp_stats hwgrp_stats; > > + struct cnxk_sso_xstats_name *xstats; > > + struct cnxk_sso_xstats_name *xstat; > > + struct roc_sso_hws_stats hws_stats; > > + uint32_t xstats_mode_count = 0; > > + uint32_t start_offset = 0; > > + unsigned int i; > > + uint64_t value; > > + void *rsp; > > + int rc; > > + > > + switch (mode) { > > + case RTE_EVENT_DEV_XSTATS_DEVICE: > > + return 0; > > + case RTE_EVENT_DEV_XSTATS_PORT: > > + if (queue_port_id >= (signed int)dev->nb_event_ports) > > + goto invalid_value; > > + > > + xstats_mode_count = CNXK_SSO_NUM_HWS_XSTATS; > > + xstats = sso_hws_xstats; > > + rc = roc_sso_hws_stats_get(&dev->sso, queue_port_id, > > + &hws_stats); > > + if (rc < 0) > > + goto invalid_value; > > + rsp = &hws_stats; > > + break; > > + case RTE_EVENT_DEV_XSTATS_QUEUE: > > + if (queue_port_id >= (signed int)dev->nb_event_queues) > > + goto invalid_value; > > + > > + xstats_mode_count = CNXK_SSO_NUM_GRP_XSTATS; > > + start_offset = CNXK_SSO_NUM_HWS_XSTATS; > > + xstats = sso_hwgrp_xstats; > > + > > + rc = roc_sso_hwgrp_stats_get(&dev->sso, queue_port_id, > > + &hwgrp_stats); > > + if (rc < 0) > > + goto invalid_value; > > + rsp = &hwgrp_stats; > > + break; > > + default: > > + plt_err("Invalid mode received"); > > + goto invalid_value; > > + }; > > + > > + for (i = 0; i < n && i < xstats_mode_count; i++) { > > + xstat = &xstats[ids[i] - start_offset]; > > + value = *(uint64_t *)((char *)rsp + xstat->offset); > > + value = (value >> xstat->shift) & xstat->mask; > > + > > + xstat->reset_snap[queue_port_id] = value; > > + } > > + return i; > > +invalid_value: > > + return -EINVAL; > > +} > > + > > +int > > +cnxk_sso_xstats_get_names(const struct rte_eventdev *event_dev, > > + enum rte_event_dev_xstats_mode mode, > > + uint8_t queue_port_id, > > + struct rte_event_dev_xstats_name *xstats_names, > > + unsigned int *ids, unsigned int size) > > +{ > > + struct rte_event_dev_xstats_name xstats_names_copy[CNXK_SSO_NUM_XSTATS]; > > + struct cnxk_sso_evdev *dev = cnxk_sso_pmd_priv(event_dev); > > + uint32_t xstats_mode_count = 0; > > + uint32_t start_offset = 0; > > + unsigned int xidx = 0; > > + unsigned int i; > > + > > + for (i = 0; i < CNXK_SSO_NUM_HWS_XSTATS; i++) { > > + snprintf(xstats_names_copy[i].name, > > + sizeof(xstats_names_copy[i].name), "%s", > > + sso_hws_xstats[i].name); > > + } > > + > > + for (; i < CNXK_SSO_NUM_XSTATS; i++) { > > + snprintf(xstats_names_copy[i].name, > > + sizeof(xstats_names_copy[i].name), "%s", > > + sso_hwgrp_xstats[i - CNXK_SSO_NUM_HWS_XSTATS].name); > > + } > > + > > + switch (mode) { > > + case RTE_EVENT_DEV_XSTATS_DEVICE: > > + break; > > + case RTE_EVENT_DEV_XSTATS_PORT: > > + if (queue_port_id >= (signed int)dev->nb_event_ports) > > + break; > > + xstats_mode_count = CNXK_SSO_NUM_HWS_XSTATS; > > + break; > > + case RTE_EVENT_DEV_XSTATS_QUEUE: > > + if (queue_port_id >= (signed int)dev->nb_event_queues) > > + break; > > + xstats_mode_count = CNXK_SSO_NUM_GRP_XSTATS; > > + start_offset = CNXK_SSO_NUM_HWS_XSTATS; > > + break; > > + default: > > + plt_err("Invalid mode received"); > > + return -EINVAL; > > + }; > > + > > + if (xstats_mode_count > size || !ids || !xstats_names) > > + return xstats_mode_count; > > + > > + for (i = 0; i < xstats_mode_count; i++) { > > + xidx = i + start_offset; > > + strncpy(xstats_names[i].name, xstats_names_copy[xidx].name, > > + sizeof(xstats_names[i].name)); > > + ids[i] = xidx; > > + } > > + > > + return i; > > +} > > diff --git a/drivers/event/cnxk/meson.build b/drivers/event/cnxk/meson.build > > index e37ea3478..5b215b73f 100644 > > --- a/drivers/event/cnxk/meson.build > > +++ b/drivers/event/cnxk/meson.build > > @@ -13,7 +13,8 @@ sources = files('cn10k_worker.c', > > 'cn9k_worker.c', > > 'cn9k_eventdev.c', > > 'cnxk_eventdev.c', > > - 'cnxk_eventdev_selftest.c' > > + 'cnxk_eventdev_selftest.c', > > + 'cnxk_eventdev_stats.c', > > ) > > > > deps += ['bus_pci', 'common_cnxk'] > >