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* [dpdk-dev] [PATCH 1/2] common/cnxk: clear rvum interrupts
@ 2021-09-21 11:00 Harman Kalra
  2021-09-21 11:00 ` [dpdk-dev] [PATCH 2/2] common/cnxk: cq overflow issue Harman Kalra
  2021-09-30 15:53 ` [dpdk-dev] [PATCH 1/2] common/cnxk: clear rvum interrupts Jerin Jacob
  0 siblings, 2 replies; 3+ messages in thread
From: Harman Kalra @ 2021-09-21 11:00 UTC (permalink / raw)
  To: dev, Nithin Dabilpuram, Kiran Kumar K, Sunil Kumar Kori, Satha Rao
  Cc: Harman Kalra

As per an known HW issue RVUM interrupts may get dropped, If an RVUM
interrupt event occurs when PCCPF_XXX_MSIX_CAP_HDR[MSIXEN]=0 then no
interrupt is triggered, which is expected. But after MSIXEN is set to
1, subsequently if same interrupts event occurs again, still no
interrupt will be triggered.

As a workaround, all RVUM interrupt lines should be cleared between
MSIXEN=0 and MSIXEN=1.

Signed-off-by: Harman Kalra <hkalra@marvell.com>
---
 drivers/common/cnxk/roc_dev.c | 35 +++++++++++++++++++++++++++++++++++
 1 file changed, 35 insertions(+)

diff --git a/drivers/common/cnxk/roc_dev.c b/drivers/common/cnxk/roc_dev.c
index 4e204373dc..ce6980cbe4 100644
--- a/drivers/common/cnxk/roc_dev.c
+++ b/drivers/common/cnxk/roc_dev.c
@@ -884,6 +884,38 @@ vf_flr_register_irqs(struct plt_pci_device *pci_dev, struct dev *dev)
 	return 0;
 }
 
+static void
+clear_rvum_interrupts(struct dev *dev)
+{
+	uint64_t intr;
+	int i;
+
+	if (dev_is_vf(dev)) {
+		/* Clear VF mbox interrupt */
+		intr = plt_read64(dev->bar2 + RVU_VF_INT);
+		if (intr)
+			plt_write64(intr, dev->bar2 + RVU_VF_INT);
+	} else {
+		/* Clear AF PF interrupt line */
+		intr = plt_read64(dev->bar2 + RVU_PF_INT);
+		if (intr)
+			plt_write64(intr, dev->bar2 + RVU_PF_INT);
+		for (i = 0; i < MAX_VFPF_DWORD_BITS; ++i) {
+			/* Clear MBOX interrupts */
+			intr = plt_read64(dev->bar2 + RVU_PF_VFPF_MBOX_INTX(i));
+			if (intr)
+				plt_write64(intr,
+					    dev->bar2 +
+						    RVU_PF_VFPF_MBOX_INTX(i));
+			/* Clear VF FLR interrupts */
+			intr = plt_read64(dev->bar2 + RVU_PF_VFFLR_INTX(i));
+			if (intr)
+				plt_write64(intr,
+					    dev->bar2 + RVU_PF_VFFLR_INTX(i));
+		}
+	}
+}
+
 int
 dev_active_vfs(struct dev *dev)
 {
@@ -1090,6 +1122,9 @@ dev_init(struct dev *dev, struct plt_pci_device *pci_dev)
 		intr_offset = RVU_PF_INT;
 	}
 
+	/* Clear all RVUM interrupts */
+	clear_rvum_interrupts(dev);
+
 	/* Initialize the local mbox */
 	rc = mbox_init(&dev->mbox_local, mbox, bar2, direction, 1, intr_offset);
 	if (rc)
-- 
2.18.0


^ permalink raw reply	[flat|nested] 3+ messages in thread

* [dpdk-dev] [PATCH 2/2] common/cnxk: cq overflow issue
  2021-09-21 11:00 [dpdk-dev] [PATCH 1/2] common/cnxk: clear rvum interrupts Harman Kalra
@ 2021-09-21 11:00 ` Harman Kalra
  2021-09-30 15:53 ` [dpdk-dev] [PATCH 1/2] common/cnxk: clear rvum interrupts Jerin Jacob
  1 sibling, 0 replies; 3+ messages in thread
From: Harman Kalra @ 2021-09-21 11:00 UTC (permalink / raw)
  To: dev, Nithin Dabilpuram, Kiran Kumar K, Sunil Kumar Kori, Satha Rao
  Cc: Harman Kalra

An issue exists on some HW revisions whereby if a CQ overflows
NIX may have undefined behavior, e.g. free incorrect buffers.
Implementing a workaround for this known HW issue.

Signed-off-by: Harman Kalra <hkalra@marvell.com>
---
 drivers/common/cnxk/roc_nix_priv.h  |  3 ++-
 drivers/common/cnxk/roc_nix_queue.c | 18 +++++++++++++++---
 2 files changed, 17 insertions(+), 4 deletions(-)

diff --git a/drivers/common/cnxk/roc_nix_priv.h b/drivers/common/cnxk/roc_nix_priv.h
index 9dc0c88a6f..1bd1b6a36b 100644
--- a/drivers/common/cnxk/roc_nix_priv.h
+++ b/drivers/common/cnxk/roc_nix_priv.h
@@ -17,7 +17,8 @@
 
 /* Apply BP/DROP when CQ is 95% full */
 #define NIX_CQ_THRESH_LEVEL	(5 * 256 / 100)
-#define NIX_RQ_AURA_THRESH(x)	(((x) * 95) / 100)
+#define NIX_CQ_FULL_ERRATA_SKID (1024ull * 256)
+#define NIX_RQ_AURA_THRESH(x)	(((x)*95) / 100)
 
 /* IRQ triggered when NIX_LF_CINTX_CNT[QCOUNT] crosses this value */
 #define CQ_CQE_THRESH_DEFAULT	0x1ULL
diff --git a/drivers/common/cnxk/roc_nix_queue.c b/drivers/common/cnxk/roc_nix_queue.c
index 76e439e7a9..d7c4844d69 100644
--- a/drivers/common/cnxk/roc_nix_queue.c
+++ b/drivers/common/cnxk/roc_nix_queue.c
@@ -2,6 +2,8 @@
  * Copyright(C) 2021 Marvell.
  */
 
+#include <math.h>
+
 #include "roc_api.h"
 #include "roc_priv.h"
 
@@ -435,7 +437,6 @@ roc_nix_cq_init(struct roc_nix *roc_nix, struct roc_nix_cq *cq)
 	cq->status = (int64_t *)(nix->base + NIX_LF_CQ_OP_STATUS);
 	cq->wdata = (uint64_t)cq->qid << 32;
 	cq->roc_nix = roc_nix;
-	cq->drop_thresh = NIX_CQ_THRESH_LEVEL;
 
 	/* CQE of W16 */
 	desc_sz = cq->nb_desc * NIX_CQ_ENTRY_SZ;
@@ -476,8 +477,19 @@ roc_nix_cq_init(struct roc_nix *roc_nix, struct roc_nix_cq *cq)
 	/* Map CQ0 [RQ0] to CINT0 and so on till max 64 irqs */
 	cq_ctx->cint_idx = cq->qid;
 
-	cq_ctx->drop = cq->drop_thresh;
-	cq_ctx->drop_ena = 1;
+	if (roc_model_is_cn96_a0() || roc_model_is_cn95_a0()) {
+		const float rx_cq_skid = NIX_CQ_FULL_ERRATA_SKID;
+		uint16_t min_rx_drop;
+
+		min_rx_drop = ceil(rx_cq_skid / (float)cq->nb_desc);
+		cq_ctx->drop = min_rx_drop;
+		cq_ctx->drop_ena = 1;
+		cq->drop_thresh = min_rx_drop;
+	} else {
+		cq->drop_thresh = NIX_CQ_THRESH_LEVEL;
+		cq_ctx->drop = cq->drop_thresh;
+		cq_ctx->drop_ena = 1;
+	}
 
 	/* TX pause frames enable flow ctrl on RX side */
 	if (nix->tx_pause) {
-- 
2.18.0


^ permalink raw reply	[flat|nested] 3+ messages in thread

* Re: [dpdk-dev] [PATCH 1/2] common/cnxk: clear rvum interrupts
  2021-09-21 11:00 [dpdk-dev] [PATCH 1/2] common/cnxk: clear rvum interrupts Harman Kalra
  2021-09-21 11:00 ` [dpdk-dev] [PATCH 2/2] common/cnxk: cq overflow issue Harman Kalra
@ 2021-09-30 15:53 ` Jerin Jacob
  1 sibling, 0 replies; 3+ messages in thread
From: Jerin Jacob @ 2021-09-30 15:53 UTC (permalink / raw)
  To: Harman Kalra, Ferruh Yigit
  Cc: dpdk-dev, Nithin Dabilpuram, Kiran Kumar K, Sunil Kumar Kori, Satha Rao

On Tue, Sep 21, 2021 at 4:30 PM Harman Kalra <hkalra@marvell.com> wrote:
>
> As per an known HW issue RVUM interrupts may get dropped, If an RVUM
> interrupt event occurs when PCCPF_XXX_MSIX_CAP_HDR[MSIXEN]=0 then no
> interrupt is triggered, which is expected. But after MSIXEN is set to
> 1, subsequently if same interrupts event occurs again, still no
> interrupt will be triggered.
>
> As a workaround, all RVUM interrupt lines should be cleared between
> MSIXEN=0 and MSIXEN=1.
>
> Signed-off-by: Harman Kalra <hkalra@marvell.com>

Series Acked-by: Jerin Jacob <jerinj@marvell.com>
Series applied to dpdk-next-net-mrvl/for-next-net. Thanks.

Changed the git log to:

commit b17c509dccf4b05d1471a2dac9c6cfd6ee78c94f (HEAD -> for-next-net)
Author: Harman Kalra <hkalra@marvell.com>
Date:   Tue Sep 21 16:30:38 2021 +0530

    common/cnxk: enable CQ overflow errata

    An issue exists on some HW revisions whereby if a CQ overflows
    NIX may have undefined behavior, e.g. free incorrect buffers.
    Implementing a workaround for this known HW issue.

    Signed-off-by: Harman Kalra <hkalra@marvell.com>
    Acked-by: Jerin Jacob <jerinj@marvell.com>

commit 416bf1eda5727a967de7b4c0475d350996e41720
Author: Harman Kalra <hkalra@marvell.com>
Date:   Tue Sep 21 16:30:37 2021 +0530

    common/cnxk: enable RVUM interrupt errata

    As per an known HW issue RVUM interrupts may get dropped, If an RVUM
    interrupt event occurs when PCCPF_XXX_MSIX_CAP_HDR[MSIXEN]=0 then no
    interrupt is triggered, which is expected. But after MSIXEN is set to
    1, subsequently if same interrupts event occurs again, still no
    interrupt will be triggered.

    As a workaround, all RVUM interrupt lines should be cleared between
    MSIXEN=0 and MSIXEN=1.

    Signed-off-by: Harman Kalra <hkalra@marvell.com>
    Acked-by: Jerin Jacob <jerinj@marvell.com>



> ---
>  drivers/common/cnxk/roc_dev.c | 35 +++++++++++++++++++++++++++++++++++
>  1 file changed, 35 insertions(+)
>
> diff --git a/drivers/common/cnxk/roc_dev.c b/drivers/common/cnxk/roc_dev.c
> index 4e204373dc..ce6980cbe4 100644
> --- a/drivers/common/cnxk/roc_dev.c
> +++ b/drivers/common/cnxk/roc_dev.c
> @@ -884,6 +884,38 @@ vf_flr_register_irqs(struct plt_pci_device *pci_dev, struct dev *dev)
>         return 0;
>  }
>
> +static void
> +clear_rvum_interrupts(struct dev *dev)
> +{
> +       uint64_t intr;
> +       int i;
> +
> +       if (dev_is_vf(dev)) {
> +               /* Clear VF mbox interrupt */
> +               intr = plt_read64(dev->bar2 + RVU_VF_INT);
> +               if (intr)
> +                       plt_write64(intr, dev->bar2 + RVU_VF_INT);
> +       } else {
> +               /* Clear AF PF interrupt line */
> +               intr = plt_read64(dev->bar2 + RVU_PF_INT);
> +               if (intr)
> +                       plt_write64(intr, dev->bar2 + RVU_PF_INT);
> +               for (i = 0; i < MAX_VFPF_DWORD_BITS; ++i) {
> +                       /* Clear MBOX interrupts */
> +                       intr = plt_read64(dev->bar2 + RVU_PF_VFPF_MBOX_INTX(i));
> +                       if (intr)
> +                               plt_write64(intr,
> +                                           dev->bar2 +
> +                                                   RVU_PF_VFPF_MBOX_INTX(i));
> +                       /* Clear VF FLR interrupts */
> +                       intr = plt_read64(dev->bar2 + RVU_PF_VFFLR_INTX(i));
> +                       if (intr)
> +                               plt_write64(intr,
> +                                           dev->bar2 + RVU_PF_VFFLR_INTX(i));
> +               }
> +       }
> +}
> +
>  int
>  dev_active_vfs(struct dev *dev)
>  {
> @@ -1090,6 +1122,9 @@ dev_init(struct dev *dev, struct plt_pci_device *pci_dev)
>                 intr_offset = RVU_PF_INT;
>         }
>
> +       /* Clear all RVUM interrupts */
> +       clear_rvum_interrupts(dev);
> +
>         /* Initialize the local mbox */
>         rc = mbox_init(&dev->mbox_local, mbox, bar2, direction, 1, intr_offset);
>         if (rc)
> --
> 2.18.0
>

^ permalink raw reply	[flat|nested] 3+ messages in thread

end of thread, other threads:[~2021-09-30 15:53 UTC | newest]

Thread overview: 3+ messages (download: mbox.gz / follow: Atom feed)
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2021-09-21 11:00 [dpdk-dev] [PATCH 1/2] common/cnxk: clear rvum interrupts Harman Kalra
2021-09-21 11:00 ` [dpdk-dev] [PATCH 2/2] common/cnxk: cq overflow issue Harman Kalra
2021-09-30 15:53 ` [dpdk-dev] [PATCH 1/2] common/cnxk: clear rvum interrupts Jerin Jacob

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