From: Jerin Jacob <jerinjacobk@gmail.com>
To: pbhagavatula@marvell.com
Cc: jerinj@marvell.com, Shijith Thotton <sthotton@marvell.com>,
Nithin Dabilpuram <ndabilpuram@marvell.com>,
Kiran Kumar K <kirankumark@marvell.com>,
Sunil Kumar Kori <skori@marvell.com>,
Satha Rao <skoteshwar@marvell.com>,
Harman Kalra <hkalra@marvell.com>,
dev@dpdk.org, stable@dpdk.org
Subject: Re: [PATCH v4] event/cnxk: fix offload flags
Date: Thu, 27 Nov 2025 10:17:23 +0530 [thread overview]
Message-ID: <CALBAE1NMMTEDykgdJ7vC4GdXcXm64ask-iHbAJZA5grGmfPYHg@mail.gmail.com> (raw)
In-Reply-To: <20251126155358.16973-1-pbhagavatula@marvell.com>
On Wed, Nov 26, 2025 at 9:41 PM <pbhagavatula@marvell.com> wrote:
>
> From: Pavan Nikhilesh <pbhagavatula@marvell.com>
>
> Use device configured Rx offloads instead of hardcoded values while
> draining work.
>
> Fixes: e8594de2731d ("event/cnxk: implement event port quiesce function")
> Cc: stable@dpdk.org
>
> Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
> ---
> drivers/event/cnxk/cn10k_eventdev.c | 9 +++------
> drivers/event/cnxk/cn10k_worker.h | 6 +++---
> drivers/event/cnxk/cn20k_eventdev.c | 8 +++-----
> drivers/event/cnxk/cn20k_worker.h | 4 ++--
> drivers/net/cnxk/cn10k_rx.h | 6 +++---
> drivers/net/cnxk/cn20k_rx.h | 6 +++---
> 6 files changed, 17 insertions(+), 22 deletions(-)
>
> diff --git a/drivers/event/cnxk/cn10k_eventdev.c b/drivers/event/cnxk/cn10k_eventdev.c
> index 3832eb7e000f..0c1431b4e70c 100644
> --- a/drivers/event/cnxk/cn10k_eventdev.c
> +++ b/drivers/event/cnxk/cn10k_eventdev.c
> @@ -126,8 +126,7 @@ cn10k_sso_hws_flush_events(void *hws, uint8_t queue_id, uintptr_t base,
>
> while (aq_cnt || cq_ds_cnt || ds_cnt) {
> plt_write64(req, ws->base + SSOW_LF_GWS_OP_GET_WORK0);
> - cn10k_sso_hws_get_work_empty(
> - ws, &ev, (NIX_RX_OFFLOAD_MAX - 1) | NIX_RX_REAS_F | NIX_RX_MULTI_SEG_F);
> + cn10k_sso_hws_get_work_empty(ws, &ev, dev->rx_offloads);
> if (fn != NULL && ev.u64 != 0)
> fn(arg, ev);
> if (ev.sched_type != SSO_TT_EMPTY)
> @@ -473,8 +472,7 @@ cn10k_sso_port_quiesce(struct rte_eventdev *event_dev, void *port,
> } while (ptag &
> (BIT_ULL(62) | BIT_ULL(58) | BIT_ULL(56) | BIT_ULL(54)));
>
> - cn10k_sso_hws_get_work_empty(ws, &ev,
> - (NIX_RX_OFFLOAD_MAX - 1) | NIX_RX_REAS_F | NIX_RX_MULTI_SEG_F);
> + cn10k_sso_hws_get_work_empty(ws, &ev, dev->rx_offloads);
> if (is_pend && ev.u64)
> if (flush_cb)
> flush_cb(event_dev->data->dev_id, ev, args);
> @@ -503,8 +501,7 @@ cn10k_sso_port_quiesce(struct rte_eventdev *event_dev, void *port,
> SSO_TT_EMPTY) {
> plt_write64(BIT_ULL(16) | 1,
> ws->base + SSOW_LF_GWS_OP_GET_WORK0);
> - cn10k_sso_hws_get_work_empty(
> - ws, &ev, (NIX_RX_OFFLOAD_MAX - 1) | NIX_RX_REAS_F | NIX_RX_MULTI_SEG_F);
> + cn10k_sso_hws_get_work_empty(ws, &ev, dev->rx_offloads);
> if (ev.u64) {
> if (flush_cb)
> flush_cb(event_dev->data->dev_id, ev, args);
> diff --git a/drivers/event/cnxk/cn10k_worker.h b/drivers/event/cnxk/cn10k_worker.h
> index 954dee5a2a9e..9b6abdf18db2 100644
> --- a/drivers/event/cnxk/cn10k_worker.h
> +++ b/drivers/event/cnxk/cn10k_worker.h
> @@ -52,12 +52,12 @@ cn10k_process_vwqe(uintptr_t vwqe, uint16_t port_id, const uint32_t flags, struc
> uint64_t mbuf_init = 0x100010000ULL | RTE_PKTMBUF_HEADROOM;
> struct cnxk_timesync_info *tstamp = ws->tstamp[port_id];
> void *lookup_mem = ws->lookup_mem;
> + uint64_t meta_aura = 0, laddr = 0;
> + uint16_t lmt_id = 0, d_off = 0;
> uintptr_t lbase = ws->lmt_base;
> - uint64_t meta_aura = 0, laddr;
> + struct rte_mempool *mp = NULL;
> struct rte_event_vector *vec;
> uint16_t nb_mbufs, non_vec;
> - struct rte_mempool *mp;
> - uint16_t lmt_id, d_off;
> struct rte_mbuf **wqe;
> struct rte_mbuf *mbuf;
> uint64_t sa_base = 0;
> diff --git a/drivers/event/cnxk/cn20k_eventdev.c b/drivers/event/cnxk/cn20k_eventdev.c
> index b25e570211f1..1c5d9272398a 100644
> --- a/drivers/event/cnxk/cn20k_eventdev.c
> +++ b/drivers/event/cnxk/cn20k_eventdev.c
> @@ -192,7 +192,7 @@ cn20k_sso_hws_flush_events(void *hws, uint8_t queue_id, uintptr_t base, cnxk_han
>
> while (aq_cnt || cq_ds_cnt || ds_cnt) {
> plt_write64(req, ws->base + SSOW_LF_GWS_OP_GET_WORK0);
> - cn20k_sso_hws_get_work_empty(ws, &ev, 0);
> + cn20k_sso_hws_get_work_empty(ws, &ev, dev->rx_offloads);
> if (fn != NULL && ev.u64 != 0)
> fn(arg, ev);
> if (ev.sched_type != SSO_TT_EMPTY)
> @@ -521,8 +521,7 @@ cn20k_sso_port_quiesce(struct rte_eventdev *event_dev, void *port,
> ptag = plt_read64(ws->base + SSOW_LF_GWS_PENDSTATE);
> } while (ptag & (BIT_ULL(62) | BIT_ULL(58) | BIT_ULL(56) | BIT_ULL(54)));
>
> - cn20k_sso_hws_get_work_empty(ws, &ev,
> - (NIX_RX_OFFLOAD_MAX - 1) | NIX_RX_REAS_F | NIX_RX_MULTI_SEG_F);
> + cn20k_sso_hws_get_work_empty(ws, &ev, dev->rx_offloads);
> if (is_pend && ev.u64)
> if (flush_cb)
> flush_cb(event_dev->data->dev_id, ev, args);
> @@ -548,8 +547,7 @@ cn20k_sso_port_quiesce(struct rte_eventdev *event_dev, void *port,
>
> if (CNXK_TT_FROM_TAG(plt_read64(ws->base + SSOW_LF_GWS_PRF_WQE0)) != SSO_TT_EMPTY) {
> plt_write64(BIT_ULL(16) | 1, ws->base + SSOW_LF_GWS_OP_GET_WORK0);
> - cn20k_sso_hws_get_work_empty(
> - ws, &ev, (NIX_RX_OFFLOAD_MAX - 1) | NIX_RX_REAS_F | NIX_RX_MULTI_SEG_F);
> + cn20k_sso_hws_get_work_empty(ws, &ev, dev->rx_offloads);
> if (ev.u64) {
> if (flush_cb)
> flush_cb(event_dev->data->dev_id, ev, args);
> diff --git a/drivers/event/cnxk/cn20k_worker.h b/drivers/event/cnxk/cn20k_worker.h
> index df0abd9202fd..608f93dcd465 100644
> --- a/drivers/event/cnxk/cn20k_worker.h
> +++ b/drivers/event/cnxk/cn20k_worker.h
> @@ -54,12 +54,12 @@ cn20k_process_vwqe(uintptr_t vwqe, uint16_t port_id, const uint32_t flags, struc
> struct cnxk_timesync_info *tstamp = ws->tstamp[port_id];
> uint8_t m_sz = sizeof(struct rte_mbuf);
> void *lookup_mem = ws->lookup_mem;
> + uint64_t meta_aura = 0, laddr = 0;
> uintptr_t lbase = ws->lmt_base;
> - uint64_t meta_aura = 0, laddr;
> + uint16_t lmt_id = 0, d_off = 0;
> struct rte_event_vector *vec;
> uint16_t nb_mbufs, non_vec;
> struct rte_mempool *mp;
> - uint16_t lmt_id, d_off;
> struct rte_mbuf **wqe;
> struct rte_mbuf *mbuf;
> uint64_t sa_base = 0;
> diff --git a/drivers/net/cnxk/cn10k_rx.h b/drivers/net/cnxk/cn10k_rx.h
> index e79306e6467f..e55910b57599 100644
> --- a/drivers/net/cnxk/cn10k_rx.h
> +++ b/drivers/net/cnxk/cn10k_rx.h
> @@ -572,7 +572,7 @@ nix_sec_meta_to_mbuf(uint64_t cq_w1, uint64_t cq_w5, uintptr_t inb_sa,
> const struct cpt_cn10k_parse_hdr_s *hdr =
> (const struct cpt_cn10k_parse_hdr_s *)cpth;
> uint64_t mbuf_init = vgetq_lane_u64(*rearm, 0);
> - struct cn10k_inb_priv_data *inb_priv;
> + struct cn10k_inb_priv_data *inb_priv = NULL;
> uintptr_t p;
>
> /* Clear checksum flags */
> @@ -1464,9 +1464,9 @@ cn10k_nix_recv_pkts_vector(void *args, struct rte_mbuf **mbufs, uint16_t pkts,
> struct rte_mbuf *mbuf0, *mbuf1, *mbuf2, *mbuf3;
> uint8_t loff = 0, lnum = 0, shft = 0;
> struct rte_mempool *meta_pool = NULL;
> + uint16_t lmt_id = 0, d_off = 0;
> + uint64_t lbase = 0, laddr = 0;
> uint8x16_t f0, f1, f2, f3;
> - uint16_t lmt_id, d_off;
> - uint64_t lbase, laddr;
> uintptr_t sa_base = 0;
> uint16_t packets = 0;
> uint16_t pkts_left;
> diff --git a/drivers/net/cnxk/cn20k_rx.h b/drivers/net/cnxk/cn20k_rx.h
> index 56826318151a..1944e507b0b2 100644
> --- a/drivers/net/cnxk/cn20k_rx.h
> +++ b/drivers/net/cnxk/cn20k_rx.h
> @@ -307,7 +307,7 @@ nix_cqe_xtract_mseg(const union nix_rx_parse_u *rx, struct rte_mbuf *mbuf, uint6
> const struct cpt_parse_hdr_s *hdr = (const struct cpt_parse_hdr_s *)cpth;
> struct cn20k_inb_priv_data *inb_priv = NULL;
> const struct cpt_frag_info_s *finfo = NULL;
> - uint64_t fsz_w1 = 0, cq_w1, cq_w5, sg;
> + uint64_t fsz_w1 = 0, cq_w1, cq_w5 = 0, sg;
> uint32_t offset = hdr->w2.ptr_offset;
> uint8_t num_frags = 0, nxt_frag = 0;
> struct rte_mbuf *head, *last_mbuf;
> @@ -845,10 +845,10 @@ cn20k_nix_recv_pkts_vector(void *args, struct rte_mbuf **mbufs, uint16_t pkts, c
> uint64x2_t rearm2 = vdupq_n_u64(mbuf_initializer);
> uint64x2_t rearm3 = vdupq_n_u64(mbuf_initializer);
> struct rte_mbuf *mbuf0, *mbuf1, *mbuf2, *mbuf3;
> + uint64_t lbase = 0, laddr = 0, buf_sz = 0;
> uint8_t loff = 0, lnum = 0, shft = 0;
> - uint64_t lbase, laddr, buf_sz;
> + uint16_t lmt_id = 0, d_off;
> uint8x16_t f0, f1, f2, f3;
> - uint16_t lmt_id, d_off;
> uintptr_t sa_base = 0;
> uint16_t packets = 0;
> uint16_t pkts_left;
> --
> 2.50.1 (Apple Git-155)
>
next prev parent reply other threads:[~2025-11-27 4:47 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-11-25 19:11 [PATCH] " pbhagavatula
2025-11-26 4:59 ` Jerin Jacob
2025-11-26 6:37 ` [PATCH v2] " pbhagavatula
2025-11-26 8:13 ` [PATCH v3] " pbhagavatula
2025-11-26 15:53 ` [PATCH v4] " pbhagavatula
2025-11-27 4:47 ` Jerin Jacob [this message]
2025-11-27 4:49 ` Jerin Jacob
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