From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 25116A0527; Mon, 9 Nov 2020 06:18:46 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 1233F323C; Mon, 9 Nov 2020 06:18:44 +0100 (CET) Received: from mail-io1-f67.google.com (mail-io1-f67.google.com [209.85.166.67]) by dpdk.org (Postfix) with ESMTP id F0B372BF1 for ; Mon, 9 Nov 2020 06:18:41 +0100 (CET) Received: by mail-io1-f67.google.com with SMTP id j12so8566288iow.0 for ; Sun, 08 Nov 2020 21:18:41 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=jGB9E8E5zot6q0d58Y5pdbb76LNPMpoEoLxJC3ingvs=; b=kNEZ3ssiL5CHqyv13Ef7adyUaZ6OtmxXKS/SVFnND1lYYfm9Ef8PzZfkv6cbjhQPuz s+Kl9RMgjyIadz9JO8W+ju5hmCqLU+X42iv7Nfu/ChZgVTicuM92DvZqFK9vzaEGPNmC o+dNVnygSH+tElmKBF4v0aZ52OsuGbFh7M3qVtnNe5yeQeYTr5KlJ+5TB9kya82/7YrG 81kaxVowQtlgRhKIvHhxtmBNwg5FkiY6powW9guuGaiTEZrCTAMDvTqVKzPtUcOqQb/W lFWfUmZ1OFPVgtH1VprYMLBtO5ceuZ1bQujXWo3NleDnyCWvMZDL3t4izWbwsA5XF4nc vUng== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=jGB9E8E5zot6q0d58Y5pdbb76LNPMpoEoLxJC3ingvs=; b=tYOHC4kkmTqRoFW9ohNwabeAogoHbXYP/tA2xCWg7OFzcXM4oxCFTMkFFBMhsPB0+a KNTNsWHblvbtG2id0T9dVgU6uRDNSSVFQfWwhO71FuP9GE0xzyLNxyfmUhnB8gTdUQz2 x1Wee6zY/Xh6WNeBCVoeHtnzyRH3qSDGz/KSQNEu/K1aNaaZhSqxBiLlmptKw/Z1wXjG I1ZTgKNQ261/mhOvXNOisIbc9VigzhqZT/jtYdns1A/1JkeHuOU/zTUvLG3JeCYfY3QE 9CfWZcji53dQVFMtSZl8RK0NrvaUWeNMpylnEwvqAkh4djwLmaH32HGgf8RZ07XsTrKh VuPQ== X-Gm-Message-State: AOAM532wyStcpj/IJNJ9bWcZsv1TiKB4ReMtYpoE/2iHW2HPCO+CJYk0 6Qk0EVsH+lK0J3RoCbZW+X3VPJZH/IUn1nt+y7E= X-Google-Smtp-Source: ABdhPJymkUMF5puEbfMh77f4AjOA7yo+oDpfD+F9nB7WwS1cYfhkYAN7Z2rU8/Max5Ab9YY7+WzmZLcaxwVBW/QbMsk= X-Received: by 2002:a5d:9a19:: with SMTP id s25mr3941310iol.94.1604899120193; Sun, 08 Nov 2020 21:18:40 -0800 (PST) MIME-Version: 1.0 References: <20201107155306.463148-1-thomas@monjalon.net> <4509916.LqRtgDRpI1@thomas> <6088267.6fNGb03Fmp@thomas> In-Reply-To: <6088267.6fNGb03Fmp@thomas> From: Jerin Jacob Date: Mon, 9 Nov 2020 10:48:24 +0530 Message-ID: To: Thomas Monjalon Cc: dpdk-dev , David Marchand , Ferruh Yigit , Olivier Matz , =?UTF-8?Q?Morten_Br=C3=B8rup?= , "Ananyev, Konstantin" , Andrew Rybchenko , Viacheslav Ovsiienko , Ajit Khaparde , Jerin Jacob , Hemant Agrawal , Ray Kinsella , Neil Horman , Nithin Dabilpuram , Kiran Kumar K Content-Type: text/plain; charset="UTF-8" Subject: Re: [dpdk-dev] [PATCH 1/1] mbuf: move pool pointer in first half X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" On Sun, Nov 8, 2020 at 2:03 AM Thomas Monjalon wrote: > > 07/11/2020 20:05, Jerin Jacob: > > On Sun, Nov 8, 2020 at 12:09 AM Thomas Monjalon wrote: > > > 07/11/2020 18:12, Jerin Jacob: > > > > On Sat, Nov 7, 2020 at 10:04 PM Thomas Monjalon wrote: > > > > > > > > > > The mempool pointer in the mbuf struct is moved > > > > > from the second to the first half. > > > > > It should increase performance on most systems having 64-byte cache line, > > > > > > > > > i.e. mbuf is split in two cache lines. > > > > > > > > But In any event, Tx needs to touch the pool to freeing back to the > > > > pool upon Tx completion. Right? > > > > Not able to understand the motivation for moving it to the first 64B cache line? > > > > The gain varies from driver to driver. For example, a Typical > > > > ARM-based NPU does not need to > > > > touch the pool in Rx and its been filled by HW. Whereas it needs to > > > > touch in Tx if the reference count is implemented. > > > > See below. > > > > > > > > > > > Due to this change, tx_offload is moved, so some vector data paths > > > > > may need to be adjusted. Note: OCTEON TX2 check is removed temporarily! > > > > > > > > It will be breaking the Tx path, Please just don't remove the static > > > > assert without adjusting the code. > > > > > > Of course not. > > > I looked at the vector Tx path of OCTEON TX2, > > > it's close to be impossible to understand :) > > > Please help! > > > > Off course. Could you check the above section any share the rationale > > for this change > > and where it helps and how much it helps? > > It has been concluded in the techboard meeting you were part of. > I don't understand why we restart this discussion again. > I won't have the energy to restart this process myself. > If you don't want to apply the techboard decision, then please > do the necessary to request another quick decision. Yes. Initially, I thought it is OK as we have 128B CL, After looking into Thomas's change, I realized it is not good for ARM64 64B catchlines based NPU as - A Typical ARM-based NPU does not need to touch the pool in Rx and its been filled by HW. Whereas it needs to touch in Tx if the reference count is implemented. - Also it will be effecting exiting vector routines I request to reconsider the tech board decision. > > >