From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 826EDA0093; Thu, 10 Mar 2022 08:40:58 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 0931C410FC; Thu, 10 Mar 2022 08:40:58 +0100 (CET) Received: from mail-il1-f181.google.com (mail-il1-f181.google.com [209.85.166.181]) by mails.dpdk.org (Postfix) with ESMTP id AA56F410DD; Thu, 10 Mar 2022 08:40:56 +0100 (CET) Received: by mail-il1-f181.google.com with SMTP id o12so3179801ilg.5; Wed, 09 Mar 2022 23:40:56 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=NFog8zvfzzZOrmVlxTLyNVbRkGZY/Pk2Ral46R+EuX0=; b=ALYae9RMeQSQJ2ioLxluanPOOy1MeRta3XBE8Ql0AzZODOtgzorLD55FtCRW2umzF3 /0Ul9tPL2Kb9EuimgOXwBdckhXeGaiirjhFxr+DlnwtecWFULa10EtOqV0D2JKna/HZ2 PwTxvtZGCEgejVIHqnjzvcqAWlESlOzBHgGUVvnf9RpaSNsZcDF9n+9JPITHsvhERjjY Eyvl7ntkmfUXl3Cjgq6NGgKG8N7ghjynAeA0RbJDAZwq13YSz/XrGlxTsmF9sYISJ54y ZhdOiVVadvhAraNBdiIBiBjskXnoY3WPtmOCrFQBHa6JH3yJyuXEYDFhjfHMYfE+GxsK v4ag== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=NFog8zvfzzZOrmVlxTLyNVbRkGZY/Pk2Ral46R+EuX0=; b=D/CwyLo4PNfNqU0iE4FC+chpK8PwEjFKlt/C+RJve1kTXIAq84l+RwNvU6AERxx0Xe LkxDMVZFxNhReCTHziFlxIBn9vZ8p3JWB1xlvaYfaY2FySX9E+Ome4ONCRBAGuRzCDdM Q5tV/Qyv6qKhD0MkdQyqEeiBE5V9Bk781Q0V9GMfO/0t+i37ddWcTuc5ghbXenrFZgph 12TCLE5lpDSe4gYpWjUsl5BtwWDsLS2fBsymAqfywZd3f/n1bsTLcgope1MX3DWuHRlG +rz75gJZ2JBs9YmRz5Qdj8tsF/fsmNEAST3bvykhhro7BmYC51jVIuDiNJEESCAefGEF atHw== X-Gm-Message-State: AOAM532fl7M7M+Qv566BY0Qo+X7paRwY9LqalVxdlgxaJ5Mep58nXNB5 CGQEUU4qrnyvQUw1ASrP9LfCeJ9Y9K8BsDirdqQmYmfsHAR8oQ== X-Google-Smtp-Source: ABdhPJwV/5cErT1LT0p/gD87a84oc+UbP9hJhx+myj5ShhUFqfSXl+nP3x/ruA+sLgCItDDTyJZ70uRARRKuUSHgoHY= X-Received: by 2002:a05:6e02:1845:b0:2c6:48d4:97d0 with SMTP id b5-20020a056e02184500b002c648d497d0mr2749945ilv.318.1646898055869; Wed, 09 Mar 2022 23:40:55 -0800 (PST) MIME-Version: 1.0 References: <20220304120833.312776-1-dsinghrawat@marvell.com> In-Reply-To: <20220304120833.312776-1-dsinghrawat@marvell.com> From: Jerin Jacob Date: Thu, 10 Mar 2022 13:10:29 +0530 Message-ID: Subject: Re: [PATCH 1/3] net/qede: fix Tx callback completion routine To: Devendra Singh Rawat Cc: dpdk-dev , Thomas Monjalon , Jerin Jacob , Ferruh Yigit , Rasesh Mody , palok@marvell.com, dpdk stable Content-Type: text/plain; charset="UTF-8" X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org On Fri, Mar 4, 2022 at 5:38 PM Devendra Singh Rawat wrote: > > Tx completion routine was first incrementing no. of free slots in Tx > ring and then freeing corresponding mbufs in bulk. In some situations > no. of mbufs freed were less than no. of Tx ring slots freed. This > caused TX ring to get into an inconsistent state and ultimately > application fails to transmit further traffic. > > The fix first updates Tx ring SW consumer index, then increments Tx ring > free slot no. and finally frees the mbuf, this is done in a single > iteration of loop. > > Fixes: 2c41740bf19e ("net/qede: get consumer index once") > Fixes: 4996b959cde6 ("net/qede: free packets in bulk") > Cc: stable@dpdk.org > > Signed-off-by: Devendra Singh Rawat > Signed-off-by: Rasesh Mody Updated the git commits as follows and applied series to dpdk-next-net-mrvl/for-next-net. Thanks -- net/qede: fix max Rx packet length calculation Size of CRC is not added to max_rx_pktlen, due to this bigger sized packets(size 1480, 1490 1500) are being dropped. This fix adds RTE_ETHER_CRC_LEN to max_rx_pktlen. Fixes: 1bb4a528c41f ("ethdev: fix max Rx packet length") Cc: stable@dpdk.org Signed-off-by: Devendra Singh Rawat Signed-off-by: Rasesh Mody --- net/qede: fix Rx callback qede_alloc_rx_bulk_mbufs() was trimming the number of requested mbufs count to QEDE_MAX_BULK_ALLOC_COUNT. The RX callback was ignorant of this trimming and it was always resetting the number of empty Rx BD ring slots to 0. This resulted in Rx BD ring getting into an inconsistent state and ultimately the application fails to receive any traffic. The fix trims the number of requested mbufs count before making call to qede_alloc_rx_bulk_mbufs(). After qede_alloc_rx_bulk_mbufs() returns successfully, the number of empty Rx BD ring slots are decremented by the correct count. Fixes: 8f2312474529 ("net/qede: fix performance bottleneck in Rx path") Cc: stable@dpdk.org Signed-off-by: Devendra Singh Rawat Signed-off-by: Rasesh Mody -- net/qede: fix Tx callback completion routine Tx completion routine was first incrementing the number of free slots in Tx ring and then freeing corresponding mbufs in bulk. In some situations, the number of mbufs freed were less than number of Tx ring slots freed. This caused Tx ring to get into an inconsistent state and ultimately application fails to transmit further traffic. The fix first updates Tx ring SW consumer index, then increments Tx ring free slot number and finally frees the mbuf, this is done in a single iteration of loop. Fixes: 2c41740bf19e ("net/qede: get consumer index once") Fixes: 4996b959cde6 ("net/qede: free packets in bulk") Cc: stable@dpdk.org Signed-off-by: Devendra Singh Rawat Signed-off-by: Rasesh Mody --- > --- > drivers/net/qede/qede_rxtx.c | 79 +++++++++++++++--------------------- > 1 file changed, 33 insertions(+), 46 deletions(-) > > diff --git a/drivers/net/qede/qede_rxtx.c b/drivers/net/qede/qede_rxtx.c > index 911bb1a260..0c52568180 100644 > --- a/drivers/net/qede/qede_rxtx.c > +++ b/drivers/net/qede/qede_rxtx.c > @@ -885,68 +885,55 @@ qede_tx_queue_start(struct rte_eth_dev *eth_dev, uint16_t tx_queue_id) > } > > static inline void > -qede_process_tx_compl(__rte_unused struct ecore_dev *edev, > - struct qede_tx_queue *txq) > +qede_free_tx_pkt(struct qede_tx_queue *txq) > { > - uint16_t hw_bd_cons; > - uint16_t sw_tx_cons; > - uint16_t remaining; > - uint16_t mask; > struct rte_mbuf *mbuf; > uint16_t nb_segs; > uint16_t idx; > - uint16_t first_idx; > - > - rte_compiler_barrier(); > - rte_prefetch0(txq->hw_cons_ptr); > - sw_tx_cons = ecore_chain_get_cons_idx(&txq->tx_pbl); > - hw_bd_cons = rte_le_to_cpu_16(*txq->hw_cons_ptr); > -#ifdef RTE_LIBRTE_QEDE_DEBUG_TX > - PMD_TX_LOG(DEBUG, txq, "Tx Completions = %u\n", > - abs(hw_bd_cons - sw_tx_cons)); > -#endif > - > - mask = NUM_TX_BDS(txq); > - idx = txq->sw_tx_cons & mask; > > - remaining = hw_bd_cons - sw_tx_cons; > - txq->nb_tx_avail += remaining; > - first_idx = idx; > - > - while (remaining) { > - mbuf = txq->sw_tx_ring[idx]; > - RTE_ASSERT(mbuf); > + idx = TX_CONS(txq); > + mbuf = txq->sw_tx_ring[idx]; > + if (mbuf) { > nb_segs = mbuf->nb_segs; > - remaining -= nb_segs; > - > - /* Prefetch the next mbuf. Note that at least the last 4 mbufs > - * that are prefetched will not be used in the current call. > - */ > - rte_mbuf_prefetch_part1(txq->sw_tx_ring[(idx + 4) & mask]); > - rte_mbuf_prefetch_part2(txq->sw_tx_ring[(idx + 4) & mask]); > - > PMD_TX_LOG(DEBUG, txq, "nb_segs to free %u\n", nb_segs); > - > while (nb_segs) { > + /* It's like consuming rxbuf in recv() */ > ecore_chain_consume(&txq->tx_pbl); > + txq->nb_tx_avail++; > nb_segs--; > } > - > - idx = (idx + 1) & mask; > + rte_pktmbuf_free(mbuf); > + txq->sw_tx_ring[idx] = NULL; > + txq->sw_tx_cons++; > PMD_TX_LOG(DEBUG, txq, "Freed tx packet\n"); > - } > - txq->sw_tx_cons = idx; > - > - if (first_idx > idx) { > - rte_pktmbuf_free_bulk(&txq->sw_tx_ring[first_idx], > - mask - first_idx + 1); > - rte_pktmbuf_free_bulk(&txq->sw_tx_ring[0], idx); > } else { > - rte_pktmbuf_free_bulk(&txq->sw_tx_ring[first_idx], > - idx - first_idx); > + ecore_chain_consume(&txq->tx_pbl); > + txq->nb_tx_avail++; > } > } > > +static inline void > +qede_process_tx_compl(__rte_unused struct ecore_dev *edev, > + struct qede_tx_queue *txq) > +{ > + uint16_t hw_bd_cons; > +#ifdef RTE_LIBRTE_QEDE_DEBUG_TX > + uint16_t sw_tx_cons; > +#endif > + > + hw_bd_cons = rte_le_to_cpu_16(*txq->hw_cons_ptr); > + /* read barrier prevents speculative execution on stale data */ > + rte_rmb(); > + > +#ifdef RTE_LIBRTE_QEDE_DEBUG_TX > + sw_tx_cons = ecore_chain_get_cons_idx(&txq->tx_pbl); > + PMD_TX_LOG(DEBUG, txq, "Tx Completions = %u\n", > + abs(hw_bd_cons - sw_tx_cons)); > +#endif > + while (hw_bd_cons != ecore_chain_get_cons_idx(&txq->tx_pbl)) > + qede_free_tx_pkt(txq); > +} > + > static int qede_drain_txq(struct qede_dev *qdev, > struct qede_tx_queue *txq, bool allow_drain) > { > -- > 2.18.2 >