From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 4C5D2A00C5; Wed, 14 Sep 2022 15:21:40 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 1D3574021D; Wed, 14 Sep 2022 15:21:40 +0200 (CEST) Received: from mail-qv1-f44.google.com (mail-qv1-f44.google.com [209.85.219.44]) by mails.dpdk.org (Postfix) with ESMTP id 0419040156 for ; Wed, 14 Sep 2022 15:21:39 +0200 (CEST) Received: by mail-qv1-f44.google.com with SMTP id d1so11713426qvs.0 for ; Wed, 14 Sep 2022 06:21:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:from:to:cc:subject:date; bh=s6zrwTmHergAnqH1tY3AOgWpoTYHvG+fbqCrhblrHzg=; b=p8QX6qo0J6VWg78fbbHZeLb43XCc+r1f6HqK/LflQLa3aPzUrrUfdeaycTMVN3uje/ 8lAm98+ASniQADZj0adn+z4Xx65f136egrAUfTF9oQ2PAgdbehlZ8o7t28eft6eu30dq +a0/7MvUm4CDb5183WTKEDBqhlXKvvgEBTqpmjZ+jluRqZYPvc98KSNYVosn/+1LsvWW srLCkm8Kl7qhUkjzy+4ceZFZZAmdWt2zp81See6nb+XjLERNZmB/yZulyjyCulQZ7Ecv 89FQpIk6QAC7cY8gOFaaIPu1pgpJdUQ5P2xj2SQ5gObyrpJr233Mk7uFZd/Ek1i6RiI8 3LSQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:x-gm-message-state:from:to:cc:subject:date; bh=s6zrwTmHergAnqH1tY3AOgWpoTYHvG+fbqCrhblrHzg=; b=BieZY1Si0x2H+3C1/wboTBYMFgAOr7YF3o8WKa3/eLRerVk2x1fk1o1kFHd+X6r/MK V8fnWJKjEbM9o+Ui3beIsLY7YfZRYicsZGDm/V4UnOA5Pz67dsVNNZ2uFKbIuucr9YLJ EpviWRiCa0MWSP7iTFcU2gH9u1LccGzoK0mCRDTLp2+kfbMHEOBYuV1yK9uzuR7DB6fY k/+8iYm08yuk03WyWsuVgs4Tvp6F5wOd7XVj8fSluEAh2QiCVhrYkCcfOEodb/zby3M8 1o1BFwxkOQKjS/8GQFGN7+3foU0lWsPuYaEYpLqF2CgueJvL7wV6werubuaPRpZn4CB6 ukig== X-Gm-Message-State: ACgBeo243b+ZUfFrjbIMDfp66HOlsn1mXeq9pgEijpHiK2+7KuKDbcJ3 JuAnLbos/2zQBXfNI1FetRy2RdcKu/lV+fmbJEUvoeraxF4= X-Google-Smtp-Source: AA6agR7JltEZfcrgrJGievNUTGLwPvBzNwj8tM36X/nIpBpf0OTfF3Tu9vmXtO6qEgNQgMNx1sngfHQMty+gXZv/QLg= X-Received: by 2002:a05:6214:310c:b0:4a7:7e9a:f16b with SMTP id ks12-20020a056214310c00b004a77e9af16bmr30841280qvb.16.1663161698291; Wed, 14 Sep 2022 06:21:38 -0700 (PDT) MIME-Version: 1.0 References: <20220829145821.2514368-1-rbhansali@marvell.com> In-Reply-To: <20220829145821.2514368-1-rbhansali@marvell.com> From: Jerin Jacob Date: Wed, 14 Sep 2022 18:51:12 +0530 Message-ID: Subject: Re: [PATCH] event/cnxk: reassembly function callback assignment To: Rahul Bhansali Cc: dev@dpdk.org, Pavan Nikhilesh , Shijith Thotton , jerinj@marvell.com Content-Type: text/plain; charset="UTF-8" X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org On Mon, Aug 29, 2022 at 8:28 PM Rahul Bhansali wrote: > > This add the support of reassembly functions callback > assignment to eventdev dequeue and dequeue_burst. > > Fixes: c062f5726f61 ("net/cnxk: support IP reassembly") > > Signed-off-by: Rahul Bhansali Updated the git commit as follows and applied to dpdk-next-net-eventdev/for-main. Thanks event/cnxk: reassembly function callback assignment Add the support of reassembly functions callback assignment to eventdev dequeue and dequeue_burst. Fixes: c062f5726f61 ("net/cnxk: support IP reassembly") Cc: stable@dpdk.org Signed-off-by: Rahul Bhansali > --- > drivers/event/cnxk/cn10k_eventdev.c | 232 ++++++++++++++---- > .../cnxk/deq/cn10k/deq_0_15_tmo_seg_burst.c | 8 +- > 2 files changed, 191 insertions(+), 49 deletions(-) > > diff --git a/drivers/event/cnxk/cn10k_eventdev.c b/drivers/event/cnxk/cn10k_eventdev.c > index 5a0cab40a9..1db44323a5 100644 > --- a/drivers/event/cnxk/cn10k_eventdev.c > +++ b/drivers/event/cnxk/cn10k_eventdev.c > @@ -389,69 +389,209 @@ cn10k_sso_fp_fns_set(struct rte_eventdev *event_dev) > #undef R > }; > > + const event_dequeue_t sso_hws_reas_deq[NIX_RX_OFFLOAD_MAX] = { > +#define R(name, flags)[flags] = cn10k_sso_hws_reas_deq_##name, > + NIX_RX_FASTPATH_MODES > +#undef R > + }; > + > + const event_dequeue_burst_t sso_hws_reas_deq_burst[NIX_RX_OFFLOAD_MAX] = { > +#define R(name, flags)[flags] = cn10k_sso_hws_reas_deq_burst_##name, > + NIX_RX_FASTPATH_MODES > +#undef R > + }; > + > + const event_dequeue_t sso_hws_reas_deq_tmo[NIX_RX_OFFLOAD_MAX] = { > +#define R(name, flags)[flags] = cn10k_sso_hws_reas_deq_tmo_##name, > + NIX_RX_FASTPATH_MODES > +#undef R > + }; > + > + const event_dequeue_burst_t sso_hws_reas_deq_tmo_burst[NIX_RX_OFFLOAD_MAX] = { > +#define R(name, flags)[flags] = cn10k_sso_hws_reas_deq_tmo_burst_##name, > + NIX_RX_FASTPATH_MODES > +#undef R > + }; > + > + const event_dequeue_t sso_hws_reas_deq_ca[NIX_RX_OFFLOAD_MAX] = { > +#define R(name, flags)[flags] = cn10k_sso_hws_reas_deq_ca_##name, > + NIX_RX_FASTPATH_MODES > +#undef R > + }; > + > + const event_dequeue_burst_t sso_hws_reas_deq_ca_burst[NIX_RX_OFFLOAD_MAX] = { > +#define R(name, flags)[flags] = cn10k_sso_hws_reas_deq_ca_burst_##name, > + NIX_RX_FASTPATH_MODES > +#undef R > + }; > + > + const event_dequeue_t sso_hws_reas_deq_tmo_ca[NIX_RX_OFFLOAD_MAX] = { > +#define R(name, flags)[flags] = cn10k_sso_hws_reas_deq_tmo_ca_##name, > + NIX_RX_FASTPATH_MODES > +#undef R > + }; > + > + const event_dequeue_burst_t sso_hws_reas_deq_tmo_ca_burst[NIX_RX_OFFLOAD_MAX] = { > +#define R(name, flags)[flags] = cn10k_sso_hws_reas_deq_tmo_ca_burst_##name, > + NIX_RX_FASTPATH_MODES > +#undef R > + }; > + > + const event_dequeue_t sso_hws_reas_deq_seg[NIX_RX_OFFLOAD_MAX] = { > +#define R(name, flags)[flags] = cn10k_sso_hws_reas_deq_seg_##name, > + > + NIX_RX_FASTPATH_MODES > +#undef R > + }; > + > + const event_dequeue_burst_t sso_hws_reas_deq_seg_burst[NIX_RX_OFFLOAD_MAX] = { > +#define R(name, flags)[flags] = cn10k_sso_hws_reas_deq_seg_burst_##name, > + NIX_RX_FASTPATH_MODES > +#undef R > + }; > + > + const event_dequeue_t sso_hws_reas_deq_tmo_seg[NIX_RX_OFFLOAD_MAX] = { > +#define R(name, flags)[flags] = cn10k_sso_hws_reas_deq_tmo_seg_##name, > + NIX_RX_FASTPATH_MODES > +#undef R > + }; > + > + const event_dequeue_burst_t sso_hws_reas_deq_tmo_seg_burst[NIX_RX_OFFLOAD_MAX] = { > +#define R(name, flags)[flags] = cn10k_sso_hws_reas_deq_tmo_seg_burst_##name, > + NIX_RX_FASTPATH_MODES > +#undef R > + }; > + > + const event_dequeue_t sso_hws_reas_deq_ca_seg[NIX_RX_OFFLOAD_MAX] = { > +#define R(name, flags)[flags] = cn10k_sso_hws_reas_deq_ca_seg_##name, > + NIX_RX_FASTPATH_MODES > +#undef R > + }; > + > + const event_dequeue_burst_t sso_hws_reas_deq_ca_seg_burst[NIX_RX_OFFLOAD_MAX] = { > +#define R(name, flags)[flags] = cn10k_sso_hws_reas_deq_ca_seg_burst_##name, > + NIX_RX_FASTPATH_MODES > +#undef R > + }; > + > + const event_dequeue_t sso_hws_reas_deq_tmo_ca_seg[NIX_RX_OFFLOAD_MAX] = { > +#define R(name, flags)[flags] = cn10k_sso_hws_reas_deq_tmo_ca_seg_##name, > + NIX_RX_FASTPATH_MODES > +#undef R > + }; > + > + const event_dequeue_burst_t sso_hws_reas_deq_tmo_ca_seg_burst[NIX_RX_OFFLOAD_MAX] = { > +#define R(name, flags)[flags] = cn10k_sso_hws_reas_deq_tmo_ca_seg_burst_##name, > + NIX_RX_FASTPATH_MODES > +#undef R > + }; > + > /* Tx modes */ > - const event_tx_adapter_enqueue_t > - sso_hws_tx_adptr_enq[NIX_TX_OFFLOAD_MAX] = { > + const event_tx_adapter_enqueue_t sso_hws_tx_adptr_enq[NIX_TX_OFFLOAD_MAX] = { > #define T(name, sz, flags)[flags] = cn10k_sso_hws_tx_adptr_enq_##name, > - NIX_TX_FASTPATH_MODES > + NIX_TX_FASTPATH_MODES > #undef T > - }; > + }; > > - const event_tx_adapter_enqueue_t > - sso_hws_tx_adptr_enq_seg[NIX_TX_OFFLOAD_MAX] = { > + const event_tx_adapter_enqueue_t sso_hws_tx_adptr_enq_seg[NIX_TX_OFFLOAD_MAX] = { > #define T(name, sz, flags)[flags] = cn10k_sso_hws_tx_adptr_enq_seg_##name, > - NIX_TX_FASTPATH_MODES > + NIX_TX_FASTPATH_MODES > #undef T > - }; > + }; > > event_dev->enqueue = cn10k_sso_hws_enq; > event_dev->enqueue_burst = cn10k_sso_hws_enq_burst; > event_dev->enqueue_new_burst = cn10k_sso_hws_enq_new_burst; > event_dev->enqueue_forward_burst = cn10k_sso_hws_enq_fwd_burst; > if (dev->rx_offloads & NIX_RX_MULTI_SEG_F) { > - CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue, > - sso_hws_deq_seg); > - CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue_burst, > - sso_hws_deq_seg_burst); > - if (dev->is_timeout_deq) { > - CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue, > - sso_hws_deq_tmo_seg); > + if (dev->rx_offloads & NIX_RX_REAS_F) { > + CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue, sso_hws_reas_deq_seg); > CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue_burst, > - sso_hws_deq_tmo_seg_burst); > - } > - if (dev->is_ca_internal_port) { > - CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue, > - sso_hws_deq_ca_seg); > - CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue_burst, > - sso_hws_deq_ca_seg_burst); > - } > - if (dev->is_timeout_deq && dev->is_ca_internal_port) { > - CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue, > - sso_hws_deq_tmo_ca_seg); > + sso_hws_reas_deq_seg_burst); > + if (dev->is_timeout_deq) { > + CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue, > + sso_hws_reas_deq_tmo_seg); > + CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue_burst, > + sso_hws_reas_deq_tmo_seg_burst); > + } > + if (dev->is_ca_internal_port) { > + CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue, > + sso_hws_reas_deq_ca_seg); > + CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue_burst, > + sso_hws_reas_deq_ca_seg_burst); > + } > + if (dev->is_timeout_deq && dev->is_ca_internal_port) { > + CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue, > + sso_hws_reas_deq_tmo_ca_seg); > + CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue_burst, > + sso_hws_reas_deq_tmo_ca_seg_burst); > + } > + } else { > + CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue, sso_hws_deq_seg); > CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue_burst, > - sso_hws_deq_tmo_ca_seg_burst); > + sso_hws_deq_seg_burst); > + > + if (dev->is_timeout_deq) { > + CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue, > + sso_hws_deq_tmo_seg); > + CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue_burst, > + sso_hws_deq_tmo_seg_burst); > + } > + if (dev->is_ca_internal_port) { > + CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue, sso_hws_deq_ca_seg); > + CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue_burst, > + sso_hws_deq_ca_seg_burst); > + } > + if (dev->is_timeout_deq && dev->is_ca_internal_port) { > + CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue, > + sso_hws_deq_tmo_ca_seg); > + CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue_burst, > + sso_hws_deq_tmo_ca_seg_burst); > + } > } > } else { > - CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue, sso_hws_deq); > - CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue_burst, > - sso_hws_deq_burst); > - if (dev->is_timeout_deq) { > - CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue, > - sso_hws_deq_tmo); > - CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue_burst, > - sso_hws_deq_tmo_burst); > - } > - if (dev->is_ca_internal_port) { > - CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue, > - sso_hws_deq_ca); > - CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue_burst, > - sso_hws_deq_ca_burst); > - } > - if (dev->is_timeout_deq && dev->is_ca_internal_port) { > - CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue, > - sso_hws_deq_tmo_ca); > + if (dev->rx_offloads & NIX_RX_REAS_F) { > + CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue, sso_hws_reas_deq); > CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue_burst, > - sso_hws_deq_tmo_ca_burst); > + sso_hws_reas_deq_burst); > + > + if (dev->is_timeout_deq) { > + CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue, > + sso_hws_reas_deq_tmo); > + CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue_burst, > + sso_hws_reas_deq_tmo_burst); > + } > + if (dev->is_ca_internal_port) { > + CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue, > + sso_hws_reas_deq_ca); > + CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue_burst, > + sso_hws_reas_deq_ca_burst); > + } > + if (dev->is_timeout_deq && dev->is_ca_internal_port) { > + CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue, > + sso_hws_reas_deq_tmo_ca); > + CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue_burst, > + sso_hws_reas_deq_tmo_ca_burst); > + } > + } else { > + CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue, sso_hws_deq); > + CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue_burst, sso_hws_deq_burst); > + > + if (dev->is_timeout_deq) { > + CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue, sso_hws_deq_tmo); > + CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue_burst, > + sso_hws_deq_tmo_burst); > + } > + if (dev->is_ca_internal_port) { > + CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue, sso_hws_deq_ca); > + CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue_burst, > + sso_hws_deq_ca_burst); > + } > + if (dev->is_timeout_deq && dev->is_ca_internal_port) { > + CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue, sso_hws_deq_tmo_ca); > + CN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue_burst, > + sso_hws_deq_tmo_ca_burst); > + } > } > } > event_dev->ca_enqueue = cn10k_sso_hws_ca_enq; > diff --git a/drivers/event/cnxk/deq/cn10k/deq_0_15_tmo_seg_burst.c b/drivers/event/cnxk/deq/cn10k/deq_0_15_tmo_seg_burst.c > index 2dff8795c8..9af8d6e128 100644 > --- a/drivers/event/cnxk/deq/cn10k/deq_0_15_tmo_seg_burst.c > +++ b/drivers/event/cnxk/deq/cn10k/deq_0_15_tmo_seg_burst.c > @@ -6,9 +6,11 @@ > #include "cnxk_eventdev.h" > #include "cnxk_worker.h" > > -#define R(name, flags) \ > - SSO_CMN_DEQ_BURST(cn10k_sso_hws_deq_tmo_seg_burst_##name, \ > - cn10k_sso_hws_reas_deq_tmo_seg_##name, flags) > +#define R(name, flags) \ > + SSO_CMN_DEQ_BURST(cn10k_sso_hws_deq_tmo_seg_burst_##name, \ > + cn10k_sso_hws_deq_tmo_seg_##name, flags) \ > + SSO_CMN_DEQ_BURST(cn10k_sso_hws_reas_deq_tmo_seg_burst_##name, \ > + cn10k_sso_hws_reas_deq_tmo_seg_##name, flags | NIX_RX_REAS_F) > > NIX_RX_FASTPATH_MODES_0_15 > #undef R > -- > 2.25.1 >