From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 910BFA0524; Sat, 20 Mar 2021 14:30:54 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 28BCA1410CB; Sat, 20 Mar 2021 14:30:54 +0100 (CET) Received: from mail-il1-f171.google.com (mail-il1-f171.google.com [209.85.166.171]) by mails.dpdk.org (Postfix) with ESMTP id 279551410C7 for ; Sat, 20 Mar 2021 14:30:53 +0100 (CET) Received: by mail-il1-f171.google.com with SMTP id v3so10624306ilj.12 for ; Sat, 20 Mar 2021 06:30:53 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=sZA830DNLzF3GdS8d/vs7lOOyOt4RPvYopRO6CGzZsk=; b=diT5gv2XFCdQrm810+1McYfQgdvtmYGNG9chJXahVsvG+Dr2Fp1NPJF+Bd5J6vqI8L JqCPd/HBYPQwK9GyNS2C4AJ37ij7Xxt4net4fRYt4M+6mUh8CpUkIDbBLlUJI5oIj1+d gTkdTVz7lUc8KTk/x2kYJWC8n1LlDJyB2X01fhoVlqppo0FsuR6rSJ94l7+/gB49pwki VodzCrl/qudDDp4ca/Wh1+hRhduecYwFMaubRKSGaLxetzRVtRkPSH6dH8OekN4xlL8o k/nV+2aghM3s5qKh4MqkBR489KtUUJBUp4Nt4PTl+eHYa45nEuWGQxD75FxNHBEb8iWY UJkw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=sZA830DNLzF3GdS8d/vs7lOOyOt4RPvYopRO6CGzZsk=; b=dniUVWEhCbHVZD9bimNDDfBwElk4uXO9CnHKM7k4rvo/stnAlzO1NegsFtnfxL/aeX y3waQJ7StVoXcpbpj8de3MiH4dJHR1yw+DpOZCFxo9eel98ZKxreyOOwfwBy3kHDvyH3 KOyD5AO3mFzR1Wwp8ZAoNUhuRR7myq3oY+PglGEhbI2xZBK0dBow6frIF4vNmmuTe8Zu UkCOALmR5knCmIdTybjWg8oQfS8nIYf6857XnwXSijSDz209vfkSqbNLSqOOBukE0+EY FEn8ACe37gO3UzYU1XtVyXiJ/vAXEZbumVBXAqXOwuljf0/jnxNY6GImVoTJDjTj67lK XB+w== X-Gm-Message-State: AOAM531Hj9iA1S7Iy3/jPcY+EwC4O+1Hja9ZtjaibU+0n7zf3tjLuswI uVZ3Vc0RTKd1smwGvNE7PAT/gFWFtaYTOFxt0OE= X-Google-Smtp-Source: ABdhPJwRC+khYwve1i+SRJwQnHNxqSLgM3ZB61XtLfQYULNveCyt8T52UxsYljDWyGsWl1cNl60kYWf99KbLqCavnyA= X-Received: by 2002:a92:b70c:: with SMTP id k12mr6395126ili.60.1616247052440; Sat, 20 Mar 2021 06:30:52 -0700 (PDT) MIME-Version: 1.0 References: <20210225122315.6350-1-pbhagavatula@marvell.com> <20210225122315.6350-3-pbhagavatula@marvell.com> In-Reply-To: <20210225122315.6350-3-pbhagavatula@marvell.com> From: Jerin Jacob Date: Sat, 20 Mar 2021 19:00:36 +0530 Message-ID: To: Pavan Nikhilesh Cc: Jerin Jacob , dpdk-dev Content-Type: text/plain; charset="UTF-8" Subject: Re: [dpdk-dev] [PATCH 3/4] event/octeontx2: reduce chunk pool memory usage X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" On Thu, Feb 25, 2021 at 5:53 PM wrote: > > From: Pavan Nikhilesh > > Reduce amount of memory used by chunk pool when the mempool used > is OCTEONTX2 NPA. Please describe the existing and new memory allocation schemes. > > Signed-off-by: Pavan Nikhilesh > --- > drivers/event/octeontx2/otx2_tim_evdev.c | 19 ++++++++++--------- > drivers/event/octeontx2/otx2_tim_evdev.h | 4 ++-- > 2 files changed, 12 insertions(+), 11 deletions(-) > > diff --git a/drivers/event/octeontx2/otx2_tim_evdev.c b/drivers/event/octeontx2/otx2_tim_evdev.c > index d1e967eb7..4fb002ddb 100644 > --- a/drivers/event/octeontx2/otx2_tim_evdev.c > +++ b/drivers/event/octeontx2/otx2_tim_evdev.c > @@ -91,6 +91,8 @@ tim_chnk_pool_create(struct otx2_tim_ring *tim_ring, > if (cache_sz > RTE_MEMPOOL_CACHE_MAX_SIZE) > cache_sz = RTE_MEMPOOL_CACHE_MAX_SIZE; > > + cache_sz = cache_sz != 0 ? cache_sz : 2; > + tim_ring->nb_chunks += (cache_sz * rte_lcore_count()); > if (!tim_ring->disable_npa) { > tim_ring->chunk_pool = rte_mempool_create_empty(pool_name, > tim_ring->nb_chunks, tim_ring->chunk_sz, > @@ -268,16 +270,15 @@ otx2_tim_ring_create(struct rte_event_timer_adapter *adptr) > } > } > > - tim_ring->nb_chunks = tim_ring->nb_timers / OTX2_TIM_NB_CHUNK_SLOTS( > - tim_ring->chunk_sz); > - tim_ring->nb_chunk_slots = OTX2_TIM_NB_CHUNK_SLOTS(tim_ring->chunk_sz); > - > - if (tim_ring->disable_npa) > + if (tim_ring->disable_npa) { > + tim_ring->nb_chunks = > + tim_ring->nb_timers / > + OTX2_TIM_NB_CHUNK_SLOTS(tim_ring->chunk_sz); > tim_ring->nb_chunks = tim_ring->nb_chunks * tim_ring->nb_bkts; > - else > - tim_ring->nb_chunks = tim_ring->nb_chunks + tim_ring->nb_bkts; > - > - /* Create buckets. */ > + } else { > + tim_ring->nb_chunks = tim_ring->nb_timers; > + } > + tim_ring->nb_chunk_slots = OTX2_TIM_NB_CHUNK_SLOTS(tim_ring->chunk_sz); > tim_ring->bkt = rte_zmalloc("otx2_tim_bucket", (tim_ring->nb_bkts) * > sizeof(struct otx2_tim_bkt), > RTE_CACHE_LINE_SIZE); > diff --git a/drivers/event/octeontx2/otx2_tim_evdev.h b/drivers/event/octeontx2/otx2_tim_evdev.h > index bf89b85b0..2a3b84a43 100644 > --- a/drivers/event/octeontx2/otx2_tim_evdev.h > +++ b/drivers/event/octeontx2/otx2_tim_evdev.h > @@ -65,12 +65,12 @@ > > #define OTX2_MAX_TIM_RINGS (256) > #define OTX2_TIM_MAX_BUCKETS (0xFFFFF) > -#define OTX2_TIM_RING_DEF_CHUNK_SZ (4096) > +#define OTX2_TIM_RING_DEF_CHUNK_SZ (1024) > #define OTX2_TIM_CHUNK_ALIGNMENT (16) > #define OTX2_TIM_MAX_BURST (RTE_CACHE_LINE_SIZE / \ > OTX2_TIM_CHUNK_ALIGNMENT) > #define OTX2_TIM_NB_CHUNK_SLOTS(sz) (((sz) / OTX2_TIM_CHUNK_ALIGNMENT) - 1) > -#define OTX2_TIM_MIN_CHUNK_SLOTS (0x1) > +#define OTX2_TIM_MIN_CHUNK_SLOTS (0x3F) > #define OTX2_TIM_MAX_CHUNK_SLOTS (0x1FFE) > #define OTX2_TIM_MIN_TMO_TKS (256) > > -- > 2.17.1 >