From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 7511642CA4; Tue, 13 Jun 2023 10:20:18 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 66BC340A8A; Tue, 13 Jun 2023 10:20:18 +0200 (CEST) Received: from mail-vs1-f52.google.com (mail-vs1-f52.google.com [209.85.217.52]) by mails.dpdk.org (Postfix) with ESMTP id C6D7640698 for ; Tue, 13 Jun 2023 10:20:16 +0200 (CEST) Received: by mail-vs1-f52.google.com with SMTP id ada2fe7eead31-43b57e0a76bso206223137.0 for ; Tue, 13 Jun 2023 01:20:16 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20221208; t=1686644416; x=1689236416; h=content-transfer-encoding:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:from:to:cc:subject:date :message-id:reply-to; bh=F2bbvTHICwW5b4ku7Jt5BCSmzJOJUgWbSFpevPL4C58=; b=E8ZhJ+ykAVGfJwUUjQAqu7WJ83s9ArM1/Ii0uIBWCer1ApuRNQX1rjscvbhA2+i91W oDWxRqWNgUlXn4yJCmD8RjAqrx+ou6hUzZanb7TfOq8kZagiEhqgq4TVHjWdwLrVEmx7 toD57E2yX/wnfNdPvYnkl2O+HPtabdo2dSA1oXN6keBLS7fkLXUGChyzp9gheL1fAvQ+ b1FkjcsLFgLdhp1GyZjVQVtwAQKVzvXq44UvXR6QvCbPVuGzmQ0rkp39E+jqc471oYp1 A4EArhXNsynx9KP1/CdiQDuKWhJVWQgculWU598mr380Qbj+NbDVVOBqB2KMdbWadHp/ atbw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1686644416; x=1689236416; h=content-transfer-encoding:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=F2bbvTHICwW5b4ku7Jt5BCSmzJOJUgWbSFpevPL4C58=; b=aNOhSDNIcc2imGGcOkzmlF9r6D1o35ZI61oPeZonnjm541LIC6vpAv2K0fLSnqogUD hMcJYGoE/quM1wDAhhkOhpwJIhnAPfmCwsOvMWXlaqfQGqW+BmYBDik5Tg9st1f1LE2u /1j/BJWq3JPfFZyqTUIZGzoMF7Wwdgn46zUrS/uFAZWNFOGMpxF/oMx0j0DjTU7/zvM8 vLwduyRqGfjSVVKng+X9XGKhXjl/ER2lU4a2z+jU/UZOHYYQNregHbS9phtRxyHJTy2J YCxj9FYBJ/Ihzd0uz4Z7c7ZXMa6YWI2NnZYiRgWnJ+iOXYwaKxMjZB/vQQW/VDcBgkFJ uJ8A== X-Gm-Message-State: AC+VfDzMFsSaR3NmxNO4Jt1kBwEM6VkCQJckQfGgKUYE+SHslEqxp000 09xnANMJikcD0zCzysEi+MITdXosSuqEPxZo95v4Vk4nwmw4pg== X-Google-Smtp-Source: ACHHUZ6pLqo4A7DiXagt+e9OyPj3kM8Pn73SklSW1lpVaFQypbvFk2eiez+aG/7e81zMJW/kRrLPtqBJzGH4ay1nZtI= X-Received: by 2002:a67:ad08:0:b0:43b:3c6e:67f7 with SMTP id t8-20020a67ad08000000b0043b3c6e67f7mr3638023vsl.22.1686644415916; Tue, 13 Jun 2023 01:20:15 -0700 (PDT) MIME-Version: 1.0 References: <20230529092312.3855432-1-jerinj@marvell.com> <20230612160627.1044076-1-jerinj@marvell.com> In-Reply-To: <20230612160627.1044076-1-jerinj@marvell.com> From: Jerin Jacob Date: Tue, 13 Jun 2023 13:49:49 +0530 Message-ID: Subject: Re: [dpdk-dev] [PATCH v2] drivers/cnxk: improve the build time for non arm64 build To: jerinj@marvell.com Cc: dev@dpdk.org, Pavan Nikhilesh , Shijith Thotton , Nithin Dabilpuram , Kiran Kumar K , Sunil Kumar Kori , Satha Rao Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org On Mon, Jun 12, 2023 at 9:36=E2=80=AFPM wrote: > > From: Jerin Jacob > > Specialized fast path routines are not applicable to non > arm64 build, removing those function contained > files to improve the build time on non arm64 build. > > Signed-off-by: Jerin Jacob > Acked-by: Nithin Dabilpuram Applied to dpdk-next-net-mrvl/for-next-net. Thanks > --- > v2: > - Just resending to go through CI again. > > drivers/event/cnxk/cn10k_eventdev.c | 5 +++++ > drivers/event/cnxk/cn9k_eventdev.c | 4 ++++ > drivers/event/cnxk/meson.build | 10 ++++++++++ > drivers/net/cnxk/cn10k_rx_select.c | 6 +++++- > drivers/net/cnxk/cn10k_tx_select.c | 6 +++++- > drivers/net/cnxk/cn9k_rx_select.c | 6 +++++- > drivers/net/cnxk/cn9k_tx_select.c | 6 +++++- > drivers/net/cnxk/meson.build | 4 ++++ > 8 files changed, 43 insertions(+), 4 deletions(-) > > diff --git a/drivers/event/cnxk/cn10k_eventdev.c b/drivers/event/cnxk/cn1= 0k_eventdev.c > index 670fc9e926..468549749f 100644 > --- a/drivers/event/cnxk/cn10k_eventdev.c > +++ b/drivers/event/cnxk/cn10k_eventdev.c > @@ -297,7 +297,9 @@ cn10k_sso_updt_tx_adptr_data(const struct rte_eventde= v *event_dev) > static void > cn10k_sso_fp_fns_set(struct rte_eventdev *event_dev) > { > +#if defined(RTE_ARCH_ARM64) > struct cnxk_sso_evdev *dev =3D cnxk_sso_pmd_priv(event_dev); > + > struct roc_cpt *cpt =3D roc_idev_cpt_get(); > const event_dequeue_t sso_hws_deq[NIX_RX_OFFLOAD_MAX] =3D { > #define R(name, flags)[flags] =3D cn10k_sso_hws_deq_##name, > @@ -473,6 +475,9 @@ cn10k_sso_fp_fns_set(struct rte_eventdev *event_dev) > CN10K_SET_EVDEV_ENQ_OP(dev, event_dev->txa_enqueue, sso_h= ws_tx_adptr_enq); > > event_dev->txa_enqueue_same_dest =3D event_dev->txa_enqueue; > +#else > + RTE_SET_USED(event_dev); > +#endif > } > > static void > diff --git a/drivers/event/cnxk/cn9k_eventdev.c b/drivers/event/cnxk/cn9k= _eventdev.c > index 7ed9aa1331..8e7af6ebd7 100644 > --- a/drivers/event/cnxk/cn9k_eventdev.c > +++ b/drivers/event/cnxk/cn9k_eventdev.c > @@ -309,6 +309,7 @@ cn9k_sso_updt_tx_adptr_data(const struct rte_eventdev= *event_dev) > static void > cn9k_sso_fp_fns_set(struct rte_eventdev *event_dev) > { > +#if defined(RTE_ARCH_ARM64) > struct cnxk_sso_evdev *dev =3D cnxk_sso_pmd_priv(event_dev); > /* Single WS modes */ > const event_dequeue_t sso_hws_deq[NIX_RX_OFFLOAD_MAX] =3D { > @@ -511,6 +512,9 @@ cn9k_sso_fp_fns_set(struct rte_eventdev *event_dev) > > event_dev->txa_enqueue_same_dest =3D event_dev->txa_enqueue; > rte_mb(); > +#else > + RTE_SET_USED(event_dev); > +#endif > } > > static void * > diff --git a/drivers/event/cnxk/meson.build b/drivers/event/cnxk/meson.bu= ild > index e38d3b0244..63b926d34f 100644 > --- a/drivers/event/cnxk/meson.build > +++ b/drivers/event/cnxk/meson.build > @@ -31,6 +31,10 @@ if soc_type =3D=3D 'cn9k' or soc_type =3D=3D 'all' > sources +=3D files( > 'cn9k_eventdev.c', > 'cn9k_worker.c', > +) > + > +if host_machine.cpu_family().startswith('aarch') > +sources +=3D files( > 'deq/cn9k/deq_0_15_burst.c', > 'deq/cn9k/deq_16_31_burst.c', > 'deq/cn9k/deq_32_47_burst.c', > @@ -202,11 +206,16 @@ sources +=3D files( > 'tx/cn9k/tx_112_127_dual_seg.c', > ) > endif > +endif > > if soc_type =3D=3D 'cn10k' or soc_type =3D=3D 'all' > sources +=3D files( > 'cn10k_eventdev.c', > 'cn10k_worker.c', > +) > + > +if host_machine.cpu_family().startswith('aarch') > +sources +=3D files( > 'deq/cn10k/deq_0_15_burst.c', > 'deq/cn10k/deq_16_31_burst.c', > 'deq/cn10k/deq_32_47_burst.c', > @@ -292,6 +301,7 @@ sources +=3D files( > 'tx/cn10k/tx_112_127_seg.c', > ) > endif > +endif > > extra_flags =3D ['-flax-vector-conversions', '-Wno-strict-aliasing'] > foreach flag: extra_flags > diff --git a/drivers/net/cnxk/cn10k_rx_select.c b/drivers/net/cnxk/cn10k_= rx_select.c > index 1e0de1b7ac..1d44f2924e 100644 > --- a/drivers/net/cnxk/cn10k_rx_select.c > +++ b/drivers/net/cnxk/cn10k_rx_select.c > @@ -5,7 +5,7 @@ > #include "cn10k_ethdev.h" > #include "cn10k_rx.h" > > -static inline void > +static __rte_used void > pick_rx_func(struct rte_eth_dev *eth_dev, > const eth_rx_burst_t rx_burst[NIX_RX_OFFLOAD_MAX]) > { > @@ -25,6 +25,7 @@ pick_rx_func(struct rte_eth_dev *eth_dev, > void > cn10k_eth_set_rx_function(struct rte_eth_dev *eth_dev) > { > +#if defined(RTE_ARCH_ARM64) > struct cnxk_eth_dev *dev =3D cnxk_eth_pmd_priv(eth_dev); > > const eth_rx_burst_t nix_eth_rx_burst[NIX_RX_OFFLOAD_MAX] =3D { > @@ -111,4 +112,7 @@ cn10k_eth_set_rx_function(struct rte_eth_dev *eth_dev= ) > return pick_rx_func(eth_dev, nix_eth_rx_vec_burst_reas); > else > return pick_rx_func(eth_dev, nix_eth_rx_vec_burst); > +#else > + RTE_SET_USED(eth_dev); > +#endif > } > diff --git a/drivers/net/cnxk/cn10k_tx_select.c b/drivers/net/cnxk/cn10k_= tx_select.c > index 54023c4234..404f5ba979 100644 > --- a/drivers/net/cnxk/cn10k_tx_select.c > +++ b/drivers/net/cnxk/cn10k_tx_select.c > @@ -5,7 +5,7 @@ > #include "cn10k_ethdev.h" > #include "cn10k_tx.h" > > -static inline void > +static __rte_used inline void > pick_tx_func(struct rte_eth_dev *eth_dev, > const eth_tx_burst_t tx_burst[NIX_TX_OFFLOAD_MAX]) > { > @@ -23,6 +23,7 @@ pick_tx_func(struct rte_eth_dev *eth_dev, > void > cn10k_eth_set_tx_function(struct rte_eth_dev *eth_dev) > { > +#if defined(RTE_ARCH_ARM64) > struct cnxk_eth_dev *dev =3D cnxk_eth_pmd_priv(eth_dev); > > const eth_tx_burst_t nix_eth_tx_burst[NIX_TX_OFFLOAD_MAX] =3D { > @@ -64,4 +65,7 @@ cn10k_eth_set_tx_function(struct rte_eth_dev *eth_dev) > } > > rte_mb(); > +#else > + RTE_SET_USED(eth_dev); > +#endif > } > diff --git a/drivers/net/cnxk/cn9k_rx_select.c b/drivers/net/cnxk/cn9k_rx= _select.c > index 79f171fcc3..05bc33ce6a 100644 > --- a/drivers/net/cnxk/cn9k_rx_select.c > +++ b/drivers/net/cnxk/cn9k_rx_select.c > @@ -5,7 +5,7 @@ > #include "cn9k_ethdev.h" > #include "cn9k_rx.h" > > -static inline void > +static __rte_used void > pick_rx_func(struct rte_eth_dev *eth_dev, > const eth_rx_burst_t rx_burst[NIX_RX_OFFLOAD_MAX]) > { > @@ -25,6 +25,7 @@ pick_rx_func(struct rte_eth_dev *eth_dev, > void > cn9k_eth_set_rx_function(struct rte_eth_dev *eth_dev) > { > +#if defined(RTE_ARCH_ARM64) > struct cnxk_eth_dev *dev =3D cnxk_eth_pmd_priv(eth_dev); > > const eth_rx_burst_t nix_eth_rx_burst[NIX_RX_OFFLOAD_MAX] =3D { > @@ -68,4 +69,7 @@ cn9k_eth_set_rx_function(struct rte_eth_dev *eth_dev) > if (dev->rx_offloads & RTE_ETH_RX_OFFLOAD_SCATTER) > return pick_rx_func(eth_dev, nix_eth_rx_vec_burst_mseg); > return pick_rx_func(eth_dev, nix_eth_rx_vec_burst); > +#else > + RTE_SET_USED(eth_dev); > +#endif > } > diff --git a/drivers/net/cnxk/cn9k_tx_select.c b/drivers/net/cnxk/cn9k_tx= _select.c > index 62beb1bf38..e08883f032 100644 > --- a/drivers/net/cnxk/cn9k_tx_select.c > +++ b/drivers/net/cnxk/cn9k_tx_select.c > @@ -5,7 +5,7 @@ > #include "cn9k_ethdev.h" > #include "cn9k_tx.h" > > -static inline void > +static __rte_used void > pick_tx_func(struct rte_eth_dev *eth_dev, > const eth_tx_burst_t tx_burst[NIX_TX_OFFLOAD_MAX]) > { > @@ -23,6 +23,7 @@ pick_tx_func(struct rte_eth_dev *eth_dev, > void > cn9k_eth_set_tx_function(struct rte_eth_dev *eth_dev) > { > +#if defined(RTE_ARCH_ARM64) > struct cnxk_eth_dev *dev =3D cnxk_eth_pmd_priv(eth_dev); > > const eth_tx_burst_t nix_eth_tx_burst[NIX_TX_OFFLOAD_MAX] =3D { > @@ -60,4 +61,7 @@ cn9k_eth_set_tx_function(struct rte_eth_dev *eth_dev) > } > > rte_mb(); > +#else > + RTE_SET_USED(eth_dev); > +#endif > } > diff --git a/drivers/net/cnxk/meson.build b/drivers/net/cnxk/meson.build > index 62b8bb90fb..394d3d01f4 100644 > --- a/drivers/net/cnxk/meson.build > +++ b/drivers/net/cnxk/meson.build > @@ -45,6 +45,7 @@ sources +=3D files( > 'cn9k_tx_select.c', > ) > > +if host_machine.cpu_family().startswith('aarch') > sources +=3D files( > 'rx/cn9k/rx_0_15.c', > 'rx/cn9k/rx_16_31.c', > @@ -115,6 +116,7 @@ sources +=3D files( > 'tx/cn9k/tx_112_127_vec_mseg.c', > ) > endif > +endif > > if soc_type =3D=3D 'cn10k' or soc_type =3D=3D 'all' > # CN10K > @@ -126,6 +128,7 @@ sources +=3D files( > 'cn10k_tx_select.c', > ) > > +if host_machine.cpu_family().startswith('aarch') > sources +=3D files( > 'rx/cn10k/rx_0_15.c', > 'rx/cn10k/rx_16_31.c', > @@ -196,6 +199,7 @@ sources +=3D files( > 'tx/cn10k/tx_112_127_vec_mseg.c', > ) > endif > +endif > > deps +=3D ['bus_pci', 'cryptodev', 'eventdev', 'security'] > deps +=3D ['common_cnxk', 'mempool_cnxk'] > -- > 2.41.0 >