From: Jerin Jacob <jerinjacobk@gmail.com>
To: Rahul Bhansali <rbhansali@marvell.com>
Cc: dev@dpdk.org, Pavan Nikhilesh <pbhagavatula@marvell.com>,
Shijith Thotton <sthotton@marvell.com>,
Nithin Dabilpuram <ndabilpuram@marvell.com>,
Kiran Kumar K <kirankumark@marvell.com>,
Sunil Kumar Kori <skori@marvell.com>,
Satha Rao <skoteshwar@marvell.com>,
jerinj@marvell.com
Subject: Re: [PATCH v2] event/cnxk: wait for CPT flow control on WQE path
Date: Tue, 24 Jan 2023 14:22:45 +0530 [thread overview]
Message-ID: <CALBAE1OG8yuaQRiYRqu6P0CK4Yyo9g343hLntPOq_87YWpKM=g@mail.gmail.com> (raw)
In-Reply-To: <20230119055315.915251-1-rbhansali@marvell.com>
On Thu, Jan 19, 2023 at 11:23 AM Rahul Bhansali <rbhansali@marvell.com> wrote:
>
> This is to avoid CPT queue overflow and thereby a CPT misc
> interrupt.
>
> Fixes: 1a7da795f64 ("net/cnxk: support Tx security offload on cn9k")
>
> Signed-off-by: Rahul Bhansali <rbhansali@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
> ---
> Changes in v2: Updated commit message.
>
> drivers/event/cnxk/cn9k_worker.h | 1 +
> drivers/net/cnxk/cn9k_tx.h | 10 ++++++++++
> 2 files changed, 11 insertions(+)
>
> diff --git a/drivers/event/cnxk/cn9k_worker.h b/drivers/event/cnxk/cn9k_worker.h
> index 54213db3b4..1ce4b044e8 100644
> --- a/drivers/event/cnxk/cn9k_worker.h
> +++ b/drivers/event/cnxk/cn9k_worker.h
> @@ -730,6 +730,7 @@ cn9k_sso_hws_xmit_sec_one(const struct cn9k_eth_txq *txq, uint64_t base,
>
> rte_io_wmb();
> cn9k_sso_txq_fc_wait(txq);
> + cn9k_nix_sec_fc_wait_one(txq);
>
> /* Write CPT instruction to lmt line */
> vst1q_u64(lmt_addr, cmd01);
> diff --git a/drivers/net/cnxk/cn9k_tx.h b/drivers/net/cnxk/cn9k_tx.h
> index 17bbdce3a0..b4ef45d65c 100644
> --- a/drivers/net/cnxk/cn9k_tx.h
> +++ b/drivers/net/cnxk/cn9k_tx.h
> @@ -411,6 +411,16 @@ cn9k_nix_xmit_prep_lmt(uint64_t *cmd, void *lmt_addr, const uint32_t flags)
> roc_lmt_mov(lmt_addr, cmd, cn9k_nix_tx_ext_subs(flags));
> }
>
> +static __rte_always_inline void
> +cn9k_nix_sec_fc_wait_one(const struct cn9k_eth_txq *txq)
> +{
> + uint64_t nb_desc = txq->cpt_desc;
> + uint64_t *fc = txq->cpt_fc;
> +
> + while (nb_desc <= __atomic_load_n(fc, __ATOMIC_RELAXED))
> + ;
> +}
> +
> static __rte_always_inline uint64_t
> cn9k_nix_xmit_submit_lmt(const rte_iova_t io_addr)
> {
> --
> 2.25.1
>
next prev parent reply other threads:[~2023-01-24 8:53 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-12-09 13:41 [PATCH] event/cnxk: wait for CPT fc on wqe path Rahul Bhansali
2023-01-18 15:06 ` Jerin Jacob
2023-01-19 5:53 ` [PATCH v2] event/cnxk: wait for CPT flow control on WQE path Rahul Bhansali
2023-01-24 8:52 ` Jerin Jacob [this message]
2023-01-24 8:53 ` Jerin Jacob
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