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From: Jerin Jacob <jerinjacobk@gmail.com>
To: Rahul Bhansali <rbhansali@marvell.com>,
	Ferruh Yigit <ferruh.yigit@intel.com>
Cc: dpdk-dev <dev@dpdk.org>,
	Nithin Dabilpuram <ndabilpuram@marvell.com>,
	 Kiran Kumar K <kirankumark@marvell.com>,
	Sunil Kumar Kori <skori@marvell.com>,
	 Satha Rao <skoteshwar@marvell.com>, Ray Kinsella <mdr@ashroe.eu>,
	Jerin Jacob <jerinj@marvell.com>
Subject: Re: [PATCH v2 1/2] common/cnxk: get head-tail of Rx and Tx queues
Date: Thu, 20 Jan 2022 12:09:59 +0530	[thread overview]
Message-ID: <CALBAE1OTMhipn+xDSdg9BT2JR4aK_Gdvs==3rW3NdMGSv7HtYA@mail.gmail.com> (raw)
In-Reply-To: <20220119094327.1488398-1-rbhansali@marvell.com>

On Wed, Jan 19, 2022 at 3:14 PM Rahul Bhansali <rbhansali@marvell.com> wrote:
>
> Adds roc APIs roc_nix_cq_head_tail_get, roc_nix_sq_head_tail_get
> to get head-tail of receive and transmit queue respectively.
>
> Signed-off-by: Rahul Bhansali <rbhansali@marvell.com>

Series Acked-by: Jerin Jacob <jerinj@marvell.com>
Series applied to dpdk-next-net-mrvl/for-next-net. Thanks.


Changed the git log to:

    common/cnxk: get head and tail of Rx and Tx queues

    Adds roc APIs roc_nix_cq_head_tail_get(), roc_nix_sq_head_tail_get()
    to get tail and head of receive and transmit queue respectively.

    Signed-off-by: Rahul Bhansali <rbhansali@marvell.com>
    Acked-by: Ray Kinsella <mdr@ashroe.eu>
    Acked-by: Jerin Jacob <jerinj@marvell.com>


> ---
> v2 changes:
>  - No change
>
>  drivers/common/cnxk/roc_nix.h       |  4 +++
>  drivers/common/cnxk/roc_nix_queue.c | 53 +++++++++++++++++++++++++++++
>  drivers/common/cnxk/version.map     |  2 ++
>  3 files changed, 59 insertions(+)
>
> diff --git a/drivers/common/cnxk/roc_nix.h b/drivers/common/cnxk/roc_nix.h
> index 69a5e8e7b4..d79abfef9f 100644
> --- a/drivers/common/cnxk/roc_nix.h
> +++ b/drivers/common/cnxk/roc_nix.h
> @@ -795,8 +795,12 @@ int __roc_api roc_nix_rq_ena_dis(struct roc_nix_rq *rq, bool enable);
>  int __roc_api roc_nix_rq_fini(struct roc_nix_rq *rq);
>  int __roc_api roc_nix_cq_init(struct roc_nix *roc_nix, struct roc_nix_cq *cq);
>  int __roc_api roc_nix_cq_fini(struct roc_nix_cq *cq);
> +void __roc_api roc_nix_cq_head_tail_get(struct roc_nix *roc_nix, uint16_t qid,
> +                                       uint32_t *head, uint32_t *tail);
>  int __roc_api roc_nix_sq_init(struct roc_nix *roc_nix, struct roc_nix_sq *sq);
>  int __roc_api roc_nix_sq_fini(struct roc_nix_sq *sq);
> +void __roc_api roc_nix_sq_head_tail_get(struct roc_nix *roc_nix, uint16_t qid,
> +                                       uint32_t *head, uint32_t *tail);
>
>  /* PTP */
>  int __roc_api roc_nix_ptp_rx_ena_dis(struct roc_nix *roc_nix, int enable);
> diff --git a/drivers/common/cnxk/roc_nix_queue.c b/drivers/common/cnxk/roc_nix_queue.c
> index c638cd43e4..67f83acdf2 100644
> --- a/drivers/common/cnxk/roc_nix_queue.c
> +++ b/drivers/common/cnxk/roc_nix_queue.c
> @@ -969,3 +969,56 @@ roc_nix_sq_fini(struct roc_nix_sq *sq)
>
>         return rc;
>  }
> +
> +void
> +roc_nix_cq_head_tail_get(struct roc_nix *roc_nix, uint16_t qid, uint32_t *head,
> +                        uint32_t *tail)
> +{
> +       struct nix *nix = roc_nix_to_nix_priv(roc_nix);
> +       uint64_t reg, val;
> +       int64_t *addr;
> +
> +       if (head == NULL || tail == NULL)
> +               return;
> +
> +       reg = (((uint64_t)qid) << 32);
> +       addr = (int64_t *)(nix->base + NIX_LF_CQ_OP_STATUS);
> +       val = roc_atomic64_add_nosync(reg, addr);
> +       if (val &
> +           (BIT_ULL(NIX_CQ_OP_STAT_OP_ERR) | BIT_ULL(NIX_CQ_OP_STAT_CQ_ERR)))
> +               val = 0;
> +
> +       *tail = (uint32_t)(val & 0xFFFFF);
> +       *head = (uint32_t)((val >> 20) & 0xFFFFF);
> +}
> +
> +void
> +roc_nix_sq_head_tail_get(struct roc_nix *roc_nix, uint16_t qid, uint32_t *head,
> +                        uint32_t *tail)
> +{
> +       struct nix *nix = roc_nix_to_nix_priv(roc_nix);
> +       struct roc_nix_sq *sq = nix->sqs[qid];
> +       uint16_t sqes_per_sqb, sqb_cnt;
> +       uint64_t reg, val;
> +       int64_t *addr;
> +
> +       if (head == NULL || tail == NULL)
> +               return;
> +
> +       reg = (((uint64_t)qid) << 32);
> +       addr = (int64_t *)(nix->base + NIX_LF_SQ_OP_STATUS);
> +       val = roc_atomic64_add_nosync(reg, addr);
> +       if (val & BIT_ULL(NIX_CQ_OP_STAT_OP_ERR)) {
> +               val = 0;
> +               return;
> +       }
> +
> +       *tail = (uint32_t)((val >> 28) & 0x3F);
> +       *head = (uint32_t)((val >> 20) & 0x3F);
> +       sqb_cnt = (uint16_t)(val & 0xFFFF);
> +
> +       sqes_per_sqb = 1 << sq->sqes_per_sqb_log2;
> +
> +       /* Update tail index as per used sqb count */
> +       *tail += (sqes_per_sqb * (sqb_cnt - 1));
> +}
> diff --git a/drivers/common/cnxk/version.map b/drivers/common/cnxk/version.map
> index 07c6720f0c..a9dba47e0e 100644
> --- a/drivers/common/cnxk/version.map
> +++ b/drivers/common/cnxk/version.map
> @@ -107,6 +107,7 @@ INTERNAL {
>         roc_nix_bpf_timeunit_get;
>         roc_nix_cq_dump;
>         roc_nix_cq_fini;
> +       roc_nix_cq_head_tail_get;
>         roc_nix_cq_init;
>         roc_nix_cqe_dump;
>         roc_nix_dev_fini;
> @@ -222,6 +223,7 @@ INTERNAL {
>         roc_nix_rx_queue_intr_enable;
>         roc_nix_sq_dump;
>         roc_nix_sq_fini;
> +       roc_nix_sq_head_tail_get;
>         roc_nix_sq_init;
>         roc_nix_stats_get;
>         roc_nix_stats_queue_get;
> --
> 2.25.1
>

      parent reply	other threads:[~2022-01-20  6:40 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-01-19  9:43 Rahul Bhansali
2022-01-19  9:43 ` [PATCH v2 2/2] net/cnxk: ethdev Rx/Tx queue status callbacks Rahul Bhansali
2022-01-19 10:54 ` [PATCH v2 1/2] common/cnxk: get head-tail of Rx and Tx queues Ray Kinsella
2022-01-20  6:39 ` Jerin Jacob [this message]

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