From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id DC28841C2D; Tue, 7 Feb 2023 10:27:45 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id B2A05410DF; Tue, 7 Feb 2023 10:27:45 +0100 (CET) Received: from mail-vs1-f53.google.com (mail-vs1-f53.google.com [209.85.217.53]) by mails.dpdk.org (Postfix) with ESMTP id BB58C40042 for ; Tue, 7 Feb 2023 10:27:44 +0100 (CET) Received: by mail-vs1-f53.google.com with SMTP id cz15so5964244vsb.6 for ; Tue, 07 Feb 2023 01:27:44 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:from:to:cc:subject:date:message-id:reply-to; bh=mpAx/ss1c375LFMcpSvEZVxUQzgH7CPU0K/QcPCGSjg=; b=hgETjX7iUlbuqjzUi84Wqow2lCBeYv5hayGpGO+BXl9Zb5URhVTC62tXlNQIEiLzj7 dZGWf9F7FcX8NsIS20SXFtoyf9e4dtVjX6fymUrj1loH0O1iTlrqQ31Tn7g6xgxEy/u+ a5JaQq5bNeCEWH9s48hIlQy6BCdDm49utCNyif/8YBdWBZEJSgUO8Ea9IcUXMVHUvQDJ 9Pk+tjvqqffskcY9CHAwPCAioO73XjTGUEqrsoAQ+m/4LNkhdPDLU5pnu0GGgR5CyEFi JAZ6IJqYIECCEoJc+7aFGgSiWeuuLHvSBLpHOk6Py12ZzqKMsu73dQJPWqSFKNEsmqAs WD2Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=mpAx/ss1c375LFMcpSvEZVxUQzgH7CPU0K/QcPCGSjg=; b=zHTrgwwA/lYyRd3bdxcD2b4m6cZ2tReaqJykH0CA2Sc1UJ1cPXRhO3u/2907F7YC+s gTgT9sHix3B01jTmqBBSu0iiU8xSigvNoB9rE4vRubNpL0CIPAiga0L+5oQsDGllwL1Z lwCxFbx+ToZrwn9G77voY+HbPsz0PSFuYj9Fh6sR3WLjoKRpmsyrFrhDrc/4twNPHBNS libcP0IZzXQC7CXXvK/JdkrWwBpM/7WhXJecw0686CQm26weewdophOyGH1rAQHXWELr 01aNY02L9Oy4I6NgSACvWQYyraRTKIzRfMSqoNxeoIiV0s6TMO5FPgYJP98pxoGe+XBT /4Fg== X-Gm-Message-State: AO0yUKXbL8W4bTwnn330aafptETmwrXDUL+iJsmgw2gxl4XHpklxgIji +i4tsfMLLyWlqxXch4NfVlszzaevNu4l+n/NP5QFN42bxoQ= X-Google-Smtp-Source: AK7set95EOrAejylv2OzZW6+TL2SKoPLYOF/XvzD1XXZl9P/qV1mjgPcbURVRX2WxEh7Qngz8yNtQEla/WZpfQLtsWI= X-Received: by 2002:a67:ee4e:0:b0:3f1:b35:72d2 with SMTP id g14-20020a67ee4e000000b003f10b3572d2mr485907vsp.73.1675762063980; Tue, 07 Feb 2023 01:27:43 -0800 (PST) MIME-Version: 1.0 References: <20230202081025.4176-1-pbhagavatula@marvell.com> In-Reply-To: <20230202081025.4176-1-pbhagavatula@marvell.com> From: Jerin Jacob Date: Tue, 7 Feb 2023 14:57:17 +0530 Message-ID: Subject: Re: [PATCH 1/2] event/cnxk: fix burst timer arm routine To: pbhagavatula@marvell.com Cc: jerinj@marvell.com, Shijith Thotton , dev@dpdk.org Content-Type: text/plain; charset="UTF-8" X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org On Thu, Feb 2, 2023 at 1:40 PM wrote: > > From: Pavan Nikhilesh > > Fix timer burst arm routine writing improper updates to > the bucket. > > Fixes: 5f644e1bd14c ("event/cnxk: add timer arm timeout burst") > > Signed-off-by: Pavan Nikhilesh > --- Series applied to dpdk-next-net-eventdev/for-main. Thanks > drivers/event/cnxk/cnxk_tim_worker.h | 81 ++++++++++++++-------------- > 1 file changed, 42 insertions(+), 39 deletions(-) > > diff --git a/drivers/event/cnxk/cnxk_tim_worker.h b/drivers/event/cnxk/cnxk_tim_worker.h > index eda84c6f31..6be31f6f9d 100644 > --- a/drivers/event/cnxk/cnxk_tim_worker.h > +++ b/drivers/event/cnxk/cnxk_tim_worker.h > @@ -270,7 +270,8 @@ cnxk_tim_add_entry_sp(struct cnxk_tim_ring *const tim_ring, > } while (hbt_state & BIT_ULL(33)); > #endif > > - if (!(hbt_state & BIT_ULL(34))) { > + if (!(hbt_state & BIT_ULL(34)) || > + !(hbt_state & GENMASK(31, 0))) { > cnxk_tim_bkt_dec_lock(bkt); > goto __retry; > } > @@ -352,7 +353,8 @@ cnxk_tim_add_entry_mp(struct cnxk_tim_ring *const tim_ring, > } while (hbt_state & BIT_ULL(33)); > #endif > > - if (!(hbt_state & BIT_ULL(34))) { > + if (!(hbt_state & BIT_ULL(34)) || > + !(hbt_state & GENMASK(31, 0))) { > cnxk_tim_bkt_dec_lock(bkt); > goto __retry; > } > @@ -449,10 +451,10 @@ cnxk_tim_add_entry_brst(struct cnxk_tim_ring *const tim_ring, > struct cnxk_tim_ent *chunk = NULL; > struct cnxk_tim_bkt *mirr_bkt; > struct cnxk_tim_bkt *bkt; > - uint16_t chunk_remainder; > + int16_t chunk_remainder; > uint16_t index = 0; > uint64_t lock_sema; > - int16_t rem, crem; > + int16_t rem; > uint8_t lock_cnt; > > __retry: > @@ -460,31 +462,6 @@ cnxk_tim_add_entry_brst(struct cnxk_tim_ring *const tim_ring, > > /* Only one thread beyond this. */ > lock_sema = cnxk_tim_bkt_inc_lock(bkt); > - lock_cnt = (uint8_t)((lock_sema >> TIM_BUCKET_W1_S_LOCK) & > - TIM_BUCKET_W1_M_LOCK); > - > - if (lock_cnt) { > - cnxk_tim_bkt_dec_lock(bkt); > -#ifdef RTE_ARCH_ARM64 > - asm volatile(PLT_CPU_FEATURE_PREAMBLE > - " ldxrb %w[lock_cnt], [%[lock]] \n" > - " tst %w[lock_cnt], 255 \n" > - " beq dne%= \n" > - " sevl \n" > - "rty%=: wfe \n" > - " ldxrb %w[lock_cnt], [%[lock]] \n" > - " tst %w[lock_cnt], 255 \n" > - " bne rty%= \n" > - "dne%=: \n" > - : [lock_cnt] "=&r"(lock_cnt) > - : [lock] "r"(&bkt->lock) > - : "memory"); > -#else > - while (__atomic_load_n(&bkt->lock, __ATOMIC_RELAXED)) > - ; > -#endif > - goto __retry; > - } > > /* Bucket related checks. */ > if (unlikely(cnxk_tim_bkt_get_hbt(lock_sema))) { > @@ -509,21 +486,46 @@ cnxk_tim_add_entry_brst(struct cnxk_tim_ring *const tim_ring, > } while (hbt_state & BIT_ULL(33)); > #endif > > - if (!(hbt_state & BIT_ULL(34))) { > + if (!(hbt_state & BIT_ULL(34)) || > + !(hbt_state & GENMASK(31, 0))) { > cnxk_tim_bkt_dec_lock(bkt); > goto __retry; > } > } > } > > + lock_cnt = (uint8_t)((lock_sema >> TIM_BUCKET_W1_S_LOCK) & > + TIM_BUCKET_W1_M_LOCK); > + if (lock_cnt) { > + cnxk_tim_bkt_dec_lock(bkt); > +#ifdef RTE_ARCH_ARM64 > + asm volatile(PLT_CPU_FEATURE_PREAMBLE > + " ldxrb %w[lock_cnt], [%[lock]] \n" > + " tst %w[lock_cnt], 255 \n" > + " beq dne%= \n" > + " sevl \n" > + "rty%=: wfe \n" > + " ldxrb %w[lock_cnt], [%[lock]] \n" > + " tst %w[lock_cnt], 255 \n" > + " bne rty%= \n" > + "dne%=: \n" > + : [lock_cnt] "=&r"(lock_cnt) > + : [lock] "r"(&bkt->lock) > + : "memory"); > +#else > + while (__atomic_load_n(&bkt->lock, __ATOMIC_RELAXED)) > + ; > +#endif > + goto __retry; > + } > + > chunk_remainder = cnxk_tim_bkt_fetch_rem(lock_sema); > rem = chunk_remainder - nb_timers; > if (rem < 0) { > - crem = tim_ring->nb_chunk_slots - chunk_remainder; > - if (chunk_remainder && crem) { > + if (chunk_remainder > 0) { > chunk = ((struct cnxk_tim_ent *) > mirr_bkt->current_chunk) + > - crem; > + tim_ring->nb_chunk_slots - chunk_remainder; > > index = cnxk_tim_cpy_wrk(index, chunk_remainder, chunk, > tim, ents, bkt); > @@ -537,18 +539,19 @@ cnxk_tim_add_entry_brst(struct cnxk_tim_ring *const tim_ring, > chunk = cnxk_tim_insert_chunk(bkt, mirr_bkt, tim_ring); > > if (unlikely(chunk == NULL)) { > - cnxk_tim_bkt_dec_lock(bkt); > + cnxk_tim_bkt_dec_lock_relaxed(bkt); > rte_errno = ENOMEM; > tim[index]->state = RTE_EVENT_TIMER_ERROR; > - return crem; > + return index; > } > *(uint64_t *)(chunk + tim_ring->nb_chunk_slots) = 0; > mirr_bkt->current_chunk = (uintptr_t)chunk; > - cnxk_tim_cpy_wrk(index, nb_timers, chunk, tim, ents, bkt); > + index = cnxk_tim_cpy_wrk(index, nb_timers, chunk, tim, ents, > + bkt) - > + index; > > - rem = nb_timers - chunk_remainder; > - cnxk_tim_bkt_set_rem(bkt, tim_ring->nb_chunk_slots - rem); > - cnxk_tim_bkt_add_nent(bkt, rem); > + cnxk_tim_bkt_set_rem(bkt, tim_ring->nb_chunk_slots - index); > + cnxk_tim_bkt_add_nent(bkt, index); > } else { > chunk = (struct cnxk_tim_ent *)mirr_bkt->current_chunk; > chunk += (tim_ring->nb_chunk_slots - chunk_remainder); > -- > 2.25.1 >