From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 9A496A0C45; Tue, 21 Sep 2021 20:11:29 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 1CA624003F; Tue, 21 Sep 2021 20:11:29 +0200 (CEST) Received: from mail-io1-f49.google.com (mail-io1-f49.google.com [209.85.166.49]) by mails.dpdk.org (Postfix) with ESMTP id 853F14003C for ; Tue, 21 Sep 2021 20:11:27 +0200 (CEST) Received: by mail-io1-f49.google.com with SMTP id b10so28423860ioq.9 for ; Tue, 21 Sep 2021 11:11:27 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc:content-transfer-encoding; bh=D+yPvStqI2sxKWYxok0CEv8UdyfsSIpv1p17wDNwS8Q=; b=bsZzYNgWlQVwxYyAwmIWfFxIxLSlf8/VjaGMI0X9m/2Yeg0p1fN0qT1iQTyDPldu8a 359ccoCVwIbnARIEbATqHD7UGMmeElm5qXYz7IW8QGRx48bX20DQp4uglfpi1B4AZSS3 5pmev7SnvdQ9ekXOlNSytXB5vIn5cBOW0gg6GNZOVBgi4tjYBm8hR5MArOLtlhnHuPlx FQV5CFgKYRbTRgQEYVNpfo1939TTILKIqlewNWc9k2WBG0vaCgn0dcdIDPanfzeZrZhC 9QoMvLodxncH4eOuQXJ858F2/TVW6J1QN+OCxy1DQjFg/yNibS9/zi226NRWIe9qIjbI oGjA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc:content-transfer-encoding; bh=D+yPvStqI2sxKWYxok0CEv8UdyfsSIpv1p17wDNwS8Q=; b=Pae5zmG5dJxzHXdG82MeAAWuir2Hnnt4bJJmQul6I/tz77NMrrZMZWOpqebnOb8MC9 XJut6lKV+IA+HOLsACTi0DnsA/F8D7vYcmUJ1zjENTfefzdCD9k01Lt/fwfWiYKMMYei kZ3iu/b9ay+23JY/o45HHrXFJhuNjYHaMia+RbqAiYU0Y/ITXWSpbZVyvl2sqtxjhvKO U2oLgRg6EeBujF38mLmn64MXESQI8WnhMl+dF+jrPcrJQ9nA24oxw87D5/6G47DVWRkh QgnQdgfuYtiGLTGOsaJ43//3HczP3n1tdm+03W/hftbyE9ubvTWFG39ol6npGnp/SmHt FAtA== X-Gm-Message-State: AOAM532/9tg7NTJQejRni3/PfDJvBAbOZqCEm/xfaWiM8rq1m6Lqt6oJ 9lRDQfiBXsysQfjy4XfWYK7QN5J7y9uOidS5Enw= X-Google-Smtp-Source: ABdhPJzsnsn1BiWUcO4nAg/6ODho98j64VlWdijj1WoElA0PBpC6Yryim9m9+YGeuMDo+JW3duU6UDjDjhr80t4P+A8= X-Received: by 2002:a5e:c701:: with SMTP id f1mr1100879iop.185.1632247886738; Tue, 21 Sep 2021 11:11:26 -0700 (PDT) MIME-Version: 1.0 References: <20210826183301.333442-1-bruce.richardson@intel.com> <20210907164925.291904-1-bruce.richardson@intel.com> <20210907164925.291904-3-bruce.richardson@intel.com> <8622d4b44e8e4b2e90a137a691f0c0a6@intel.com> In-Reply-To: From: Jerin Jacob Date: Tue, 21 Sep 2021 23:41:00 +0530 Message-ID: To: "Pai G, Sunil" Cc: "Hu, Jiayu" , "Richardson, Bruce" , dpdk-dev , "Walsh, Conor" , "Laatz, Kevin" , fengchengwen , Jerin Jacob , Satananda Burla , Radha Mohan Chintakuntla Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Subject: Re: [dpdk-dev] [PATCH v3 2/8] dmadev: add burst capacity API X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" On Tue, Sep 21, 2021 at 10:42 PM Pai G, Sunil wrote= : > > Hi Jerin, > > > > > > > To understand it better, Could you share more details on feedback > > > > mechanism on your application enqueue > > > > > > > > app_enqueue_v1(.., nb_seg) > > > > { > > > > /* Not enough space, Let application handle it by > > > > dropping or resubmitting */ > > > > if (rte_dmadev_burst_capacity() < nb_seg) > > > > return -ENOSPC; > > > > > > > > do rte_dma_op() in loop without checking error; > > > > return 0; // Success > > > > } > > > > > > > > vs > > > > app_enqueue_v2(.., nb_seg) > > > > { > > > > int rc; > > > > > > > > rc |=3D rte_dma_op() in loop without checking error; > > > > return rc; // return the actual status to application > > > > if Not enough space, Let application handle it by dropping or > > > > resubmitting */ } > > > > > > > > Is app_enqueue_v1() and app_enqueue_v2() logically the same from > > > > application PoV. Right? > > > > > > > > If not, could you explain, the version you are planning to do for > > > > app_enqueue() > > > > > > The exact version can be found here : > > > > > http://patchwork.ozlabs.org/project/openvswitch/patch/20210907120021.4 > > > 093604-2-sunil.pai.g@intel.com/ Unfortunately, both versions are not > > > same in our case because of the SW fallback we have for ring full sce= nario's. > > > For a packet with 8 nb_segs, if the ring has only space for 4 , we > > > would avoid this packet with app_enqueue_v1 while going ahead with an > > enqueue with app_enqueue_v2, resulting in a mix of DMA and CPU copies > > for a packet which we would want to avoid. > > > > Thanks for RFC link. Usage is clear now, Since you are checking the spa= ce in > > the completion handler, I am not sure, what is hard to get the remainin= g > > space, Will following logic work to find the empty space. If not, pleas= e discuss > > the issue with this approach. I am trying to avoid yet another fastpath= API > > and complication in driver as there is element checking space in the su= bmit > > queue and completion queue at least in our hardware. > > > > max_count =3D nb_desc; (power of 2) > > mask =3D max_count - 1; > > > > for (i =3D 0; I < n; i++) { > > submit_idx =3D rte_dma_copy(); > > } > > rc =3D rte_dma_completed(=E2=80=A6, &completed_idx..); > > space_in_queue =3D mask - ((submit_idx =E2=80=93 completed_idx) &= mask); > > > > Unfortunately, space left in the device (as calculated by the app) still = can mean there is no space in the device :| > i.e its pmd dependent. I did not pay much attention to Jiayu's reply as I did not know what is DSA= . Now I searched the DSA in ml, I could see the PMD patches. If it is PMD limitation then I am fine with the proposed API. @Richardson, Bruce @Laatz, Kevin @feng Since it is used fastpath, Can we move to fastpath handler and remove additional check in fastpath from common code like other APIs. > > As Jiayu mentioned before: > > The fact is that it's very hard for apps to calculate the available spa= ce of a DMA ring. > > For DSA, the available space is decided by three factors: the number of= available slots > > in SW ring, the max batching size of a batch descriptor, and if there a= re available batch > > descriptors. The first one is configured by SW, and apps can calculate = it. But the second > > depends on DSA HW, and the third one is hided in DSA driver which is no= t visible to apps. > > Considering the complexity of different DMA HW, I think the best way is= to hide all details > > inside DMA dev and provide this check capacity API for apps. > > > > Thanks and regards, > Sunil >