From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id BD626A00C4; Thu, 20 Jan 2022 07:55:03 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 3352941C25; Thu, 20 Jan 2022 07:55:03 +0100 (CET) Received: from mail-io1-f47.google.com (mail-io1-f47.google.com [209.85.166.47]) by mails.dpdk.org (Postfix) with ESMTP id A1FC940042 for ; Thu, 20 Jan 2022 07:55:02 +0100 (CET) Received: by mail-io1-f47.google.com with SMTP id i82so5816373ioa.8 for ; Wed, 19 Jan 2022 22:55:02 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=GSBTaPwWmFV/FtOv0Kw08ccnoe5vA3rUjmNVFnOFEoM=; b=QGj53XrTUt+18qILb/ziUT1D0W2dSEKiyeaS0puVNT5Zop+Hx28Z+72s6iZO97j7bS 6v9bGqsjZmftOW9iGiqnV7Ek1bBY/ic3Y8TB4hjlUmLLIBVpuOMKAVB98R5F9OG6Vu1L TM1hFzj27Q4KBzc71DxP4vGDouXinIGQzkU/TNccIasBRLGSkhJvDIxo6j8bGhR0pIlS itU6acawM8sND2A3fIn/mQNkgHf5aJmO1jIxOSahcOMNkN6kClUf42YbYNu6RVVzHUhd 8A6wMEBauS0XKLmcgchM0v30Cv4Y8B0urdMuI4/6OdtLlcjpWDb6Y5EnAwOgxJ8aWyhV 005Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=GSBTaPwWmFV/FtOv0Kw08ccnoe5vA3rUjmNVFnOFEoM=; b=voDeRqnVcb+LmBNeyTVWrkGxsWmPokT545cOaLAiPFJSE7DnzQRto0Yh74NG09PeNJ TB5Lb8foFV6EiNFgdnvFxwehRx1oG1QawJtDGJwkNCbMzC3Iss8XmAukWaHJoRlAf0aQ noAOtKHqgWUm58LNxvtF2pHExULcFZGVfxVyuPDyCF0TU0oUi8VbYq/wpMHjZmpN1dN9 H29Y48g8gJ+7NG1pM++uip0po4vbLD6Ua34Nk5Bkv1j5/85fUyN8gM4W+ozY3YgMPyOG 1kticjmf/87uHLAaY79qJhTb2BuwqYpW7esK0g0eRKAqQrOWAolWOALeeLgbXKxqw6kc 1DYQ== X-Gm-Message-State: AOAM531VU2Qd1DDmZHf7dQNeE4ZUZyAPIKoZ7HRhFZbF1dK+gVSBcVxe PdrHvvxvfdgcBKa6ALtSwZWBpQy2AseEHgRwH7UEdWZI4aU= X-Google-Smtp-Source: ABdhPJxwZlfOFpkXCsNDHB0T1Ntg2rnoL8B0/vlD9GWwMVcH3fQfWD7qhyc134HLfCP4nbc2NsqfaEEVjTpUtSADCu8= X-Received: by 2002:a5d:9306:: with SMTP id l6mr2759488ion.154.1642661701921; Wed, 19 Jan 2022 22:55:01 -0800 (PST) MIME-Version: 1.0 References: <20220103055709.82768-1-psatheesh@marvell.com> <20220103061909.83319-1-psatheesh@marvell.com> In-Reply-To: <20220103061909.83319-1-psatheesh@marvell.com> From: Jerin Jacob Date: Thu, 20 Jan 2022 12:24:35 +0530 Message-ID: Subject: Re: [dpdk-dev] [PATCH v2 1/4] drivers: add support for switch header type pre L2 To: Satheesh Paul Cc: Nithin Dabilpuram , Kiran Kumar K , Sunil Kumar Kori , Satha Rao , dpdk-dev Content-Type: text/plain; charset="UTF-8" X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org On Mon, Jan 3, 2022 at 11:49 AM wrote: > > From: Kiran Kumar K > > Adding changes to configure switch header type pre L2 for cnxk. > Along with switch header type user needs to provide the > offset with in the custom header that holds the size of the > custom header and mask for the size with in the size offset. 1) with in -> within 2) Describe what is pre L2 in the commit message. 3) Change the subject to net/cnxk: support pre L2 switch header type Also remove "add" in other patches in the series. 4) Please rebase to fix the following [for-next-net]dell[dpdk-next-net-mrvl] $ git pw series apply 21048 Failed to apply patch: Applying: drivers: add support for switch header type pre L2 Applying: common/cnxk: support custom pre L2 header parsing as raw Applying: common/cnxk: support matching VLAN existence in RTE Flow error: sha1 information is lacking or useless (drivers/common/cnxk/roc_npc_priv.h). error: could not build fake ancestor hint: Use 'git am --show-current-patch=diff' to see the failed patch Patch failed at 0003 common/cnxk: support matching VLAN existence in RTE Flow When you have resolved this problem, run "git am --continue". If you prefer to skip this patch, run "git am --skip" instead. To restore the original branch and stop patching, run "git am --abort". > > Signed-off-by: Kiran Kumar K > Reviewed-by: Satheesh Paul > --- > v2: > * Fixed checkpatch errors in commit messages > > doc/guides/nics/cnxk.rst | 25 +++++++++++++++- > drivers/common/cnxk/hw/npc.h | 11 ++++--- > drivers/common/cnxk/roc_mbox.h | 1 + > drivers/common/cnxk/roc_nix.h | 5 +++- > drivers/common/cnxk/roc_nix_ops.c | 12 +++++++- > drivers/common/cnxk/roc_npc.h | 8 +++++ > drivers/net/cnxk/cnxk_ethdev.c | 7 +++-- > drivers/net/cnxk/cnxk_ethdev_devargs.c | 41 ++++++++++++++++++++++++++ > 8 files changed, 99 insertions(+), 11 deletions(-) > > diff --git a/doc/guides/nics/cnxk.rst b/doc/guides/nics/cnxk.rst > index 2927c6cb7e..7c82cb55e1 100644 > --- a/doc/guides/nics/cnxk.rst > +++ b/doc/guides/nics/cnxk.rst > @@ -167,7 +167,30 @@ Runtime Config Options > > With the above configuration, higig2 will be enabled on that port and the > traffic on this port should be higig2 traffic only. Supported switch header > - types are "chlen24b", "chlen90b", "dsa", "exdsa", "higig2" and "vlan_exdsa". > + types are "chlen24b", "chlen90b", "dsa", "exdsa", "higig2", "vlan_exdsa" and "pre_l2". > + > +- ``Flow pre l2 info`` (default ``0x0/0x0/0x0``) > + > + In case of custom pre l2 headers, an offset, mask with in the offset and shift direction Please explain a bit on what is pre l2 header. > + has to be provided within the custom header that holds the size of the custom header. > + This is valid only with switch header pre l2. Maximum supported offset range is 0 to 255 pre l2 -> ``pre_l2`` > + and mask range is 1 to 255 and shift direction, 0: left shift, 1: right shift. > + Info format will be "offset/mask/shift direction". All parameters has to be in hexadecimal > + format and mask should be contiguous. Info can be configured using > + ``flow_pre_l2_info`` ``devargs`` parameter. > + > + For example:: > + > + -a 0002:02:00.0,switch_header="pre_l2",flow_pre_l2_info=0x2/0x7e/0x1 > + > + With the above configuration, custom pre l2 header will be enabled on that port and size > + of the header is placed at byte offset 0x2 in the packet with mask 0x7e and right shift will > + be used to get the size. i.e size will be (pkt[0x2] & 0x7e) >> shift count. > + Shift count will be calculated based on mask and shift direction. For example if mask is 0x7c For example -> For example, > + and shift direction is 1, i.e right shift, then the shift count will be 2 i.e absolute > + position of the right most set bit. If the mask is 0x7c and shift direction is 0, i.e left > + shift, then the shift count will be 1, i.e 8-n, where n is the absolute position of > + left most set bit. > > - ``RSS tag as XOR`` (default ``0``)