From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 76AC2A09E4; Thu, 22 Apr 2021 11:22:22 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 3BAFB413E6; Thu, 22 Apr 2021 11:22:22 +0200 (CEST) Received: from mail-il1-f175.google.com (mail-il1-f175.google.com [209.85.166.175]) by mails.dpdk.org (Postfix) with ESMTP id D3FB14069D; Thu, 22 Apr 2021 11:22:20 +0200 (CEST) Received: by mail-il1-f175.google.com with SMTP id c15so37281931ilj.1; Thu, 22 Apr 2021 02:22:20 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc:content-transfer-encoding; bh=vQylsb/p6f++KPzYG/bDf46s+MjHSIM3a+0eY2UtfI4=; b=iSDib/9Y+8LuAyThJWhoxyLUvQtCV9v4HgjAmsVH8vEhgpWfQT0v9E1oraF1VTi84u s/G9DXuJJNxWex/sr2MzYkbpa/wxuJGceIXFOmATF7WhNAbbBap6xzl89VQDGV6OeBEm rjWtc7yoXfGXdF6BLzSFSd8CYtOYMa3AB3Bm8LqiJ+93iG182iS6Wge18AnVVSI+Dijr QuRV8/Mp3bfaPHgeNMgP9x6cifNQ2KduW/+bJpVTH8NfESOcWXKUyDUiLvi5kv1KAqBz CoC8Td7VAOeCriTq09fmzsIBzOI0Fg03G14cVPTfVs8HZZ36O2ZP3aS37EZX5NcQS5Lt zocQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc:content-transfer-encoding; bh=vQylsb/p6f++KPzYG/bDf46s+MjHSIM3a+0eY2UtfI4=; b=Nw3WVOfRTvG/B2XMunYedOUO2omDiHmidpU8yMK0RLllA362P6nJGV5CuqolWc4+ot MkuT1jS37Rg/Dk/MY8lN5kJoa70VoTqG5hvd//HXYWw8aCI/CqmTNdyNvrfiswYlgJ86 2yEF12LeHKTz2yGhZ4fWe/beTZUr4eHdM6WEsm/0AxU6vDCMgBPgRyLcm4u5zLrSJL9x tfaK4gQKPGVue63DTusQz+YPGQQLVpkdk5BGPdSOdB/zzv4Epfw3X/ImxeM+j+fEC9zY kEA+qOLtsQAlevB6VVs20M3BDzntsGX0RhPZR0EgNoArZ2FaZh6Ntx8l4aOgHmiXrYAk kB3w== X-Gm-Message-State: AOAM530QWal3WG1TUTM4jCs7VF/wL/wzKHNALWYiRjKD0K5UbqXqmARY zcTQSu+P+3r1HrmagIyPvciLSQxHlZZpjejcsd0= X-Google-Smtp-Source: ABdhPJxTZkvJKrQT9v8wOnoX3rzaQdcUtLqdMkeSHIgWdnlQvbAz1+gX67WC/4Jmc8rgo/937NJeV6/uRZtggkhD1M8= X-Received: by 2002:a05:6e02:e0a:: with SMTP id a10mr1810536ilk.271.1619083340155; Thu, 22 Apr 2021 02:22:20 -0700 (PDT) MIME-Version: 1.0 References: <1619082711-7471-1-git-send-email-juraj.linkes@pantheon.tech> In-Reply-To: <1619082711-7471-1-git-send-email-juraj.linkes@pantheon.tech> From: Jerin Jacob Date: Thu, 22 Apr 2021 14:52:04 +0530 Message-ID: To: =?UTF-8?Q?Juraj_Linke=C5=A1?= Cc: Thomas Monjalon , David Marchand , Honnappa Nagarahalli , "Ruifeng Wang (Arm Technology China)" , Jerin Jacob , dpdk-dev , dpdk stable Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Subject: Re: [dpdk-dev] [PATCH v1] eal/arm64: fix aarch64 reg platform value X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" On Thu, Apr 22, 2021 at 2:41 PM Juraj Linke=C5=A1 wrote: > > REG_PLATFORM only uses bit 0 to indicate whether the value retrieved > from hardware matches PLATFORM_STR. > > Signed-off-by: Juraj Linke=C5=A1 > Fixes: 97523f822ba9 ("eal/arm: add CPU flags for ARMv8") Fixes and cc stable should go above Signoff. > Cc: jerinj@marvell.com > Cc: stable@dpdk.org Reviewed-by: Jerin Jacob > --- > lib/eal/arm/rte_cpuflags.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/lib/eal/arm/rte_cpuflags.c b/lib/eal/arm/rte_cpuflags.c > index e3a53bcece..e709a2800e 100644 > --- a/lib/eal/arm/rte_cpuflags.c > +++ b/lib/eal/arm/rte_cpuflags.c > @@ -108,7 +108,7 @@ const struct feature_entry rte_cpu_feature_table[] = =3D { > FEAT_DEF(SVEF32MM, REG_HWCAP2, 10) > FEAT_DEF(SVEF64MM, REG_HWCAP2, 11) > FEAT_DEF(SVEBF16, REG_HWCAP2, 12) > - FEAT_DEF(AARCH64, REG_PLATFORM, 1) > + FEAT_DEF(AARCH64, REG_PLATFORM, 0) > }; > #endif /* RTE_ARCH */ > > -- > 2.20.1 >