From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id BDE9EA0350; Wed, 24 Jun 2020 14:51:13 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 10FC71D921; Wed, 24 Jun 2020 14:51:13 +0200 (CEST) Received: from mail-io1-f68.google.com (mail-io1-f68.google.com [209.85.166.68]) by dpdk.org (Postfix) with ESMTP id 40E8F1D918; Wed, 24 Jun 2020 14:51:11 +0200 (CEST) Received: by mail-io1-f68.google.com with SMTP id k23so1943777iom.10; Wed, 24 Jun 2020 05:51:11 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=86IwmJlFPJmCNQApLWiSSB3EvmqQKDdgvAz3iCqslHk=; b=AOA4HB31YG6VJQghi0z+2JchGJnAWdybLggL8OUvEw/alYbelA8ixrP4vtLJeE4pg6 OCpvS8ordXP6JXfRZjbv+qgWmgSvm5HFmCe4lto05TgozTm4FiRshuCrxNbRo0v4vKDB m3PUA0Fp83ThqOq3hPJ/C4gny+onU4YUyBp8RgZe3q1oQwHgZsrIohwIgENH9TpwwzWl /RJwsgBFQ2HtG30FnwhyaAYiDD6Crn56ag2ACHA0E2JvShcC60k00VIMiopPoJFAgiBV xQE+69t2iKNqc5UPuoZLd/Dvoux/6EMbcT8RJuWNzSrgjSx1lWLBq9ETa64iJHzII8XF LMOQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=86IwmJlFPJmCNQApLWiSSB3EvmqQKDdgvAz3iCqslHk=; b=FmVxGB99WxsjoNOBrtN7gNTeAifYJdG7f3bDNvm/CnEZXQlsftHkh2MW1yuhtrLsy2 KtgF+O9ukFnOhI7xevF/6Ef0APxBCgmHkXO4gKNPEibPzpEBJd9BUq1wH5fbyoEmDVBJ OLg/mN/hDpSteP+wqyJtVz1XaeHlr84L91NVaVh6qDyoKuheKnDXGtcrAe9jSR9RUW2k UclbhhoFWbMRMKBWDoh85NN1rOrS7RFV3nPNnDIRJnzvK3uMbZTRTgnHwn1RUcmQKzKL uzo39D1A1UeSPHb3CmhxwFkmogCGc2vf2v3agxRXDWSFSRowbKbs0E5y1OThMTxyK8jB 4Y+g== X-Gm-Message-State: AOAM530iV4KVmQ5k/WWgIskSYtvtCyrfPvs4FcR2QYcwEmdy7S3xudQx 6ppzSWotxX7yU06Ax87qLjReEp36WSgSPgRCIko= X-Google-Smtp-Source: ABdhPJxcg7b1XMiD3gGTzo19qCMFhz0eZWNV6jChiqvv9TEH9t5aemLuObf+ue0HXBuMyIhiBou5v4rPXARw0ZmJSeA= X-Received: by 2002:a6b:b344:: with SMTP id c65mr17464400iof.123.1593003070317; Wed, 24 Jun 2020 05:51:10 -0700 (PDT) MIME-Version: 1.0 References: <20200608213417.9764-1-honnappa.nagarahalli@arm.com> In-Reply-To: <20200608213417.9764-1-honnappa.nagarahalli@arm.com> From: Jerin Jacob Date: Wed, 24 Jun 2020 18:20:54 +0530 Message-ID: To: Honnappa Nagarahalli Cc: dpdk-dev , Jerin Jacob , Hemant Agrawal , Akhil Goyal , ogerlitz@mellanox.com, Ajit Khaparde , ruigeng.wang@arm.com, Dharmik Thakkar , Phil Yang , dpdk stable Content-Type: text/plain; charset="UTF-8" Subject: Re: [dpdk-dev] [PATCH] eal: generic counter based loop for CPU freq calculation X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" On Tue, Jun 9, 2020 at 3:04 AM Honnappa Nagarahalli wrote: > > get_tsc_freq uses 'nanosleep' system call to calculate the CPU > frequency. However, 'nanosleep' results in the process getting > un-scheduled. The kernel saves and restores the PMU state. This > ensures that the PMU cycles are not counted towards a sleeping > process. When RTE_ARM_EAL_RDTSC_USE_PMU is defined, this results > in incorrect CPU frequency calculation. This logic is replaced > with generic counter based loop. > > Bugzilla ID: 450 > Fixes: af75078fece3 ("first public release") The Fix looks good to me. The Fixes is not correct. It should be the patch where RTE_ARM_EAL_RDTSC_USE_PMU got introduced. > Cc: stable@dpdk.org > > Signed-off-by: Honnappa Nagarahalli > Reviewed-by: Ruifeng Wang > Reviewed-by: Dharmik Thakkar > Reviewed-by: Phil Yang > > --- > lib/librte_eal/arm/include/rte_cycles_64.h | 45 +++++++++++++++++++--- > lib/librte_eal/arm/rte_cycles.c | 24 ++++++++++-- > 2 files changed, 61 insertions(+), 8 deletions(-) > > diff --git a/lib/librte_eal/arm/include/rte_cycles_64.h b/lib/librte_eal/arm/include/rte_cycles_64.h > index da557b6a1..6fc352036 100644 > --- a/lib/librte_eal/arm/include/rte_cycles_64.h > +++ b/lib/librte_eal/arm/include/rte_cycles_64.h > @@ -11,6 +11,36 @@ extern "C" { > > #include "generic/rte_cycles.h" > > +/** Read generic counter frequency */ > +static inline uint64_t I prefer to have __rte_allways_inline > +__rte_rd_generic_cntr_freq(void) I think, the generic counter is confusing, I think, since the symbol is exposed due to placed in header file, it is better to change, __rte_arm64_cntfrq() > +{ > + uint64_t freq; > + > + asm volatile("mrs %0, cntfrq_el0" : "=r" (freq)); > + return freq; > +} > + > +/** Read generic counter */ > +static inline uint64_t Likewise, __rte_arm64_cntvct() > +__rte_rd_generic_cntr(void) > +{ > + uint64_t tsc; > + > + asm volatile("mrs %0, cntvct_el0" : "=r" (tsc)); > + return tsc; > +} > + > +static inline uint64_t > +__rte_rd_generic_cntr_precise(void) __rte_arm64_cntfrq_precise() > +{ > + uint64_t tsc; > + > + asm volatile("isb" : : : "memory"); > + asm volatile("mrs %0, cntvct_el0" : "=r" (tsc)); > + return tsc; > +} > + > /** > * Read the time base register. > * > @@ -25,10 +55,7 @@ extern "C" { > static inline uint64_t > rte_rdtsc(void) > { > - uint64_t tsc; > - > - asm volatile("mrs %0, cntvct_el0" : "=r" (tsc)); > - return tsc; > + return __rte_rd_generic_cntr(); > } > #else > /** > @@ -49,14 +76,22 @@ rte_rdtsc(void) > * asm volatile("msr pmcr_el0, %0" : : "r" (val)); > * > */ > + > +/** Read PMU cycle counter */ > static inline uint64_t > -rte_rdtsc(void) > +__rte_rd_pmu_cycle_cntr(void) > { > uint64_t tsc; > > asm volatile("mrs %0, pmccntr_el0" : "=r"(tsc)); > return tsc; > } > + > +static inline uint64_t > +rte_rdtsc(void) > +{ > + return __rte_rd_pmu_cycle_cntr(); > +} > #endif > > static inline uint64_t > diff --git a/lib/librte_eal/arm/rte_cycles.c b/lib/librte_eal/arm/rte_cycles.c > index 3500d523e..92c87a8a4 100644 > --- a/lib/librte_eal/arm/rte_cycles.c > +++ b/lib/librte_eal/arm/rte_cycles.c > @@ -3,14 +3,32 @@ > */ > > #include "eal_private.h" > +#include "rte_cycles.h" > > uint64_t > get_tsc_freq_arch(void) > { > #if defined RTE_ARCH_ARM64 && !defined RTE_ARM_EAL_RDTSC_USE_PMU > - uint64_t freq; > - asm volatile("mrs %0, cntfrq_el0" : "=r" (freq)); > - return freq; > + return __rte_rd_generic_cntr_freq(); > +#elif defined RTE_ARCH_ARM64 && defined RTE_ARM_EAL_RDTSC_USE_PMU > + /* Use the generic counter ticks to calculate the PMU > + * cycle frequency. > + */ > + uint64_t gcnt_ticks; > + uint64_t start_ticks, cur_ticks; > + uint64_t start_pmu_cycles, end_pmu_cycles; > + > + /* Number of ticks for 1/10 second */ > + gcnt_ticks = __rte_rd_generic_cntr_freq() / 10; > + > + start_ticks = __rte_rd_generic_cntr_precise(); > + start_pmu_cycles = rte_rdtsc_precise(); > + do { > + cur_ticks = __rte_rd_generic_cntr(); > + } while ((cur_ticks - start_ticks) < gcnt_ticks); > + end_pmu_cycles = rte_rdtsc_precise(); > + > + return ((end_pmu_cycles - start_pmu_cycles) * 10); Good thought. On the plus side, it will reduce the boot time by .9 sec. > #else > return 0; With above changes: Acked-by: Jerin Jacob > #endif > -- > 2.17.1 >